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HardFault_Handler occure when Timer interrupt enableing

Hi
I am using LPC1788 evaluation kit (OEM509 board) and I need to use timer interrupt and CMSIS RTX OS at the same time.

here is a part of source code:

TIM_ConfigStruct.PrescaleOption=TIM_PRESCALE_USVAL;
TIM_ConfigStruct.PrescaleValue=100;
TIM_MatchConfigStruct.IntOnMatch=TRUE;
TIM_MatchConfigStruct.MatchChannel=0;
TIM_MatchConfigStruct.ResetOnMatch=TRUE;
TIM_MatchConfigStruct.StopOnMatch=FALSE;
TIM_MatchConfigStruct.MatchValue=10000;
TIM_Init(LPC_TIM0,TIM_TIMER_MODE,&TIM_ConfigStruct);
TIM_ConfigMatch(LPC_TIM0,&TIM_MatchConfigStruct);
NVIC_SetPriority(TIMER0_IRQ0,((0x01<<3)|0x01));
NVIC_EnableIRQ(TIMER0_IRQn);
TIM_CMD(LPC_TIM0,ENABLE);

when this code runnig without RTX is fully functional but when I added RTX to project HardFault_Handler will occure at the end of TIM_ConfigMatch (when return).

I've checked it with privilege and unprivilege mode but doesn't effect.

Parents
  • Check the Bus Fault register. Is the PRECISERR bit set (D1 bit)??
    If yes, than check the address (faulting address) in the Bus_Fault_Addr Register (BFAR).

    Study the memory map in the data sheet. Find the address is in which peripheral register-space (May be, the Timer is not powered-on from PCONP register).

Reply
  • Check the Bus Fault register. Is the PRECISERR bit set (D1 bit)??
    If yes, than check the address (faulting address) in the Bus_Fault_Addr Register (BFAR).

    Study the memory map in the data sheet. Find the address is in which peripheral register-space (May be, the Timer is not powered-on from PCONP register).

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