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Cortext M3 Program Counter

Muhammad Ahsan
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Note: This was originally posted on 21st March 2011 at http://forums.arm.com

Hello all,
I am using Cortex M3 (which support only Thumb-2 Instruction Set). I want to let the PC to jump to a particular address. When I try to use PC as destination register to move the address in the PC, a fault exception occurs. I have read the Ref. Manual but could not find any restrictions that may apply on PC. I am using IAR IDE. Any help would be highly appreciated.
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    Note: This was originally posted on 22nd March 2011 at http://forums.arm.com

    The addresses where I want PC to jump have anding 0x..5 and 0x...A, which i assume are odd. While reading I also came across that the address should be word aligned, which means ending of address should be 0, 4, 8, or C. I also read that the bit 0 of the address where the PC should jump must be 1, which is contradiction with the earlier statement. Either I am not understanding it properly or there is some mistake. Anybody has any explaination of it?


    Make sure the address is odd.
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    Note: This was originally posted on 22nd March 2011 at http://forums.arm.com

    Instructions for ARM instructions must be word aligned in memory, and for Thumb instructions they must be half-word aligned.

    When used in the PC the LSB of the register is not part of the address, but encodes mode to set on the branch. For Thumb it should be one, and for ARM should be zero.

    Iso
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    Note: This was originally posted on 22nd March 2011 at http://forums.arm.com

    Make sure the address is odd.