GCC support for R52plus+fpuv5-sp-d16

Hi everyone,

We are using GCC 15.2 to compile our code, with the -mcpu and -mfpu configuration shown below.

We encountered an issue: when the -O1 optimization level is selected, the following GIC configuration code generates a VSTR instruction to write 64-bit data to the irouter register. This operation results in a Data Abort exception.

It looks like the VSTR instruction is supported under the specific configuration of the R52+ core.

So now we have no idea about what reason causes the data abort exception? Any insights would be greatly appreciated.

Regards