AXI4 BVALID Specification

Hi

I'd like to ask whether the following BVALID violates the specification when consecutive single writes.

Regarding the two cases of BVALID shown below : 

In Case1, BVALID for different BIDs is asserted high consecutively

In Case2, BVALID  is asserted one clock later for next BID.

I would like to confirm whether Case1 violates the specification.