Hi,
I am connecting the BRAM inside FPGA with the Cortex-MO processor. Is it possible to program the BRAM using JTAG? The BRAM will act here as on-chip memory having the memory map of 0x00000000. I do not intend to put the program file in the beginning. I may initialize it to 0. After I synthesize the configuration/design in FPGA and then I want to program the BRAM in RUN time using JTAG which is similar to flash programming. Is this possible?
thanks.
Mezan1 said:Is it possible to program the BRAM using JTAG?
Surely, that's a question for the (unnamed) FPGA manufacturer?
Thank you so much for your reply. I will be connecting the BRAM using cmsdk_ahb_to_flash32.v file used for memory interfacing with AHB bus. I also see that the top module has interfaced with JTAG to debug the processor. Will it be sufficient for programming the BRAM? or I need to have extra interface beside the cmsdk_ahb_to_flash32 which is used to read and write from memory? you can find cmsdk_ahb_to_flash32 here.
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0479d/BABCEHHI.html
This really has nothing to do with ARM or Cortex-M - it's a matter of what the FPGA fabric and/or tools support.
You need to be asking the FPGA manufacturer about this.
You still haven't said who the manufacturer is, or what FPGA it is.
eg, https://www.xilinx.com/html_docs/xilinx2017_4/sdaccel_doc/jbt1504034294480.html
https://forums.xilinx.com/t5/Other-FPGA-Architecture/read-bram-from-jtag-or-uart-or-zynq-PS/td-p/738600
I apologize for not being clear.
I am using https://numato.com/product/mimas-v2-spartan-6-fpga-development-board-with-ddr-sdram
or https://opalkelly.com/products/xem6010/
I thought that writing a wrapper file with the memory would allow me to flash the Bram even though it is interfaced with the AHB bus.
Thank you for your help. you are so responsive. just let me know if anything helps me.
kind regards
me meznaur