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Hi All
here is the statement about fixed burst in axi spec.
The byte lanes that are valid are constant for all beats in the burst. However, within those byte lanes, the actual bytes that have WSTRB asserted can differ for each beat in the burst.if byte lanes that are valid are constant for all beats, the WSTRB signal should be same in all beatswhy do the actual bytes that have WSTRB asserted can differ for each beat in the burst?I am confusedThanks!
Thanks for your detail response.