Is it
MOVS pc, r14
or
SUBS pc, r14, #4
This is written in the ARMDEN0013D. but in the table it says next instruction whereas the SUBS pc, r14, #4 means the instruction which was interrupted.
In some code I wrote a little over a year ago (before moving to Cortex-M), I used...
subs pc,lr,#4 /* [1] return from interrupt */
...for returning from the FIQ interrupt. This code was running on an ARM7TDMI.
Hi!
In the DDI0406C (ARM Architecture Reference Manual ARMv7-A and ARMv7-R edition) on page B1-1172 and 1173 it is first a table with the "preferred return address" that shows that the preffered return address is the next instruction (as the table in the programmer's guide shows) but then under the heading "Exception taken to a PL1 mode" it says
"The link value is saved in the LR for the mode to which the exception is taken.
The saved link value is the preferred return address for the exception, plus an offset that depends on
the instruction set state when the exception was taken, as Table B1-7 shows:"
and then this table follows that shows that this offset for FIQ (and IRQ) are +4 in both ARM and Thumb state.
So to compensate for the offset you have to subtract 4.
Yes it does make sense now. The preferred return address is that of the next instruction. And we add +4 so pc points to 8 bytes ahead, which it is supposed to since pc always points to instruction 8 bytes ahead.
when irq/fiq happens, that is the instruction that is interrupted.