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Consider a micro-kernel (not Linux) where device drivers are userland applications (PL0).
We would like to use DMA based device, like an Ethernet controller for example. To this mean, the micro kernel allocate some memory to the user application. In the past, we allocate Device Memory for this purpose, as a quick and dirty solution because we could only allocate normal cacheable memory or device memory. We recently changed that to allocate memory which is:
- Normal memory
Now some driver code is no longer working as expected. I'm pretty sure were are missing some memory barriers, but I'd like to know if our goal is achievable: can we use DMA with normal, non-cacheable memory (shared or not, any advice on the matter is welcome) without using cache maintenance operation.
If that matters, the CPU we are targeting are Cortex A9 (with PL310 L2 cache) and Cortex A7
There should be no fundamental problem in doing this. Barriers might be all you need on the Cortex-A7.
On the Cortex-A9, though, you may have to follow a DSB with an L2C-310 Cache Sync operation to be sure it drains it's buffers.
Thank you for the suggestion ! We'll investigate that soon. On cortex a7 we indeed were missing some DMB. Cortex A9 are next
It seems we don't have to sync the PL310, but I'm keeping this in mind if we ever encounter the same errors on such boards, since it might be just luck :)