AHB spec related queries

Note: This was originally posted on 1st December 2011 at http://forums.arm.com

I found that in the AHB spec Rev 2 it is mentioned that AHB burst can be of any length but the upper limit is that the address should not cross 1KB boundary. We wanted to know what this 1KB boundary means and how is it calculated. It would be of a great help if it is explained with some relevant examples.

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  • Note: This was originally posted on 1st December 2011 at http://forums.arm.com

    A 1KB boundary is simply a multiple of 1K, so 0 (0x0), 1024 (0x400), 2048 (0x800), 3072 (0xC00), etc.

    Bursts cannot cross these boundaries because the minimum address range assigned to an AHB slave is 1KB. If you had 2 slaves back to back in the address space, and a burst DID cross a 1KB boundary from the first slave to the second, you could have problems in both slaves.

    As an example of this...

    Slave1 might see an INCR8 word-width burst indicated, starting at 0x3EC, so 5 transfers to slave 1 (0x3EC, 0x3F0, 0x3F4, 0x3F8 and 0x3FC), and then the burst crosses to Slave2. But slave 1 has been told to expect 8 transfers (so a protocol violation as masters cannot terminate bursts they have indicated, and potentially redundant Slave1 prefetches if it had tried to interpret what the master actually wanted and had prefetched from 0x0, 0x004 and 0x008 to complete 8 accesses).

    Slave2 also then sees HBURST=INCR8, but the burst it is selected for starts with a SEQ access (protocol violation), and there are only 3 transfers from the master (0x400, 0x404 and 0x408), so the same burst termination protocol violation as before.

    Even if you were not using a defined length burst, and instead just used burst type INCR, the first transfer Slave2 sees is a SEQ, and the slave state machine might not be designed to accept this if it attempts to differentiate between NONSEQ and SEQ accesses. So the INCR burst would need to end when it reached the 1KB boundary, and start with a NONSEQ at the 1KB boundary (potentially a different slave).

    Forcing bursts to terminate at 1KB boundaries shouldn't be a significant problem, even if the slave is physically larger than 1KB in size (so not crossing between 2 smaller slaves). Most uses for defined length bursts use burst aligned start addresses (typically cache line accesses), so these wouldn't be crossing 1KB boundaries anyway, and for occasions where the start address isn't burst aligned, most won't cross a 1KB boundary. Undefined length bursts just terminate when they reach the boundary and start on the other side of it, so simple to code in the bus master.

    What this solution does is make the master design work regardless of the physical construction of the slaves. Otherwise the master needs to know if address 0x400 in the above example is a boundary between 2 slaves that cannot be crossed, making the master application specific, and then not reusable.

    JD
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