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Home many performance monitoring units (PMU) are in ARM Cortex A-53 and A-9? Is there a single PMU for each core or single PMU for the whole processor?
Though the TRM is not clear about this, I am pretty sure it is one PMU per core. Esp. because most events like L1 cache accesses make no sense if they count every core's events.
At least a CA9 TRM shows the PMU as part of the core complex.