Has anyone had problems with implementing App Note AN387 using Cortex M0 r2p0 on a Cortex-M + dev board?

All,

I received the Versatile Express Cortex-M Prototyping System + and am using DesignStart. I powered on the board and the operating system booted up without any problems.

In the V2M_MPS2/MB/HBI0263C/board.txt file, the following are the sequence of steps I followed:

1)  AN385\an385_v3.txt - Cortex-M3 is what comes factory default and it booted up okay

2)  I changed to AN387\an387_v4.txt - Cortex-M0 and it booted up okay

3)  My next step was to simply take unmodified Cortex-M0 r2p0 rtl code and follow the steps in the AN387 FPGA Build instructions and make       sure the system boots up correctly.

The first time I tried this, I got this error in the LOG. I am using Quartus Prime Version 16.1.0 Build 196 10/24/2016 SJ Lite Edition. I used AT510-MN-80001-r2p0-00rel0 and I followed section 6 which is titled:

FPGA Build Guide of Arm® Cortex®-M0 DesignStart  Eval FPGA Revision: r2p0 User Guide

Thanks,

Craig

Here is my LOG File Output:

ARM V2M-MPS2 CMSIS-DAP Firmware v2.1.7 Build Date: Aug 19 2015

MotherBoard Revision C Variant A MotherBoard Serial Number 0275560101-0017

ARM V2M Boot Loader v1.0.0

Switching on main power...

Configuring motherboard (rev C, var A)...

Reading Board File \MB\HBI0263C\AN387\an387_v5.txt

Configuring FPGA from file \MB\HBI0263C\AN387\an387_v5.rbe FPGA config: PASSED

Partial reconfiguration of FPGA from file \MB\HBI0263C\AN387\an387_v5.rbf

ERROR: waiting for PR_READY.

Failed to program FPGA partial reconfiguration image...

Powering down...

Parents
  • Michele,

    Here are the relevant files.  The sources came with ARM Cortex-M Prototyping System.  I just modified them. You can see in the board.txt file how I commented out the Cortex-M3 Factory Default and Cortex-M0 r0p0 Design Start which ran just fine.  My problem began when I tried the  Cortex-M0 r2p0 compiled by Quartus.

    board.txt
    BOARD: HBI0263
    TITLE: Motherboard configuration file
    
    [MCCS]
    MBBIOS: mbb_v217.ebf         ;MB BIOS IMAGE
    
    [APPLICATION NOTE]           ;Please select the required processor
    ;APPFILE: AN382\an382_v3.txt ; - Cortex-M0
    ;APPFILE: AN383\an383_v3.txt ; - Cortex-M0+
    ;APPFILE: AN384\an384_v3.txt ; - Cortex-M1
    ;APPFILE: AN385\an385_v3.txt  ; - Cortex-M3 Factory Default
    ;APPFILE: AN386\an386_v3.txt ; - Cortex-M4
    ;APPFILE: AN500\an500_v1.txt ; - Cortex-M7
    ;APPFILE: AN387\an387_v4.txt ; - Cortex-M0 r0p0 Design Start passes
    APPFILE: AN387\an387_v5.txt ; - Cortex-M0 r2p0 fails Design Start Compiled by Craig using Quartus-Lite ERROR: waiting for PR_READY.
    
    an387_v5.txt
    BOARD: HBI0263
    TITLE: AN387 application note configuration file
    
    [FPGAS]
    TOTALFPGAS: 2               ;Total Number of FPGAs (Max: 3)
    F0FILE: an387_v5.rbe        ;FPGA0 Filename - Static base image
    F0MODE: FPGA                ;FPGA0 Programming Mode
    F1FILE: an387_v5.rbf        ;FPGA1 Filename - PR user partition
    F1MODE: FPGA                ;FPGA1 Programming Mode
    
    [OSCCLKS]
    TOTALOSCCLKS: 3
    OSC0: 50.0                  ;OSC0 System clock in MHz
    OSC1: 24.576                ;OSC1 AACI clock in MHz
    OSC2: 25.0                  ;OSC2 MISC clock in MHz
    
    [SCC REGISTERS]
    TOTALSYSCONS: 1             ;Total Number of SYSCON registers defined
    SYSCON: 0x000 0x00000001    ;SCC enable ZBT remap
    
    4353.LOG.TXT

    Regards,

    Craig

Reply Children