We are using Cortex-M0 DesignStart Pro to design MCU. When we use SWD to download grogram to flash in FPGA(Cortex_m0 mcu inside), we cannot to connect keil with FPGA, and Keil shows:" Could not stop Cortex-M device!Please check the JTAG cable. "
Attached are keil display error messages, simulation waveforms, and data analysis captured by the logic analyzer.
Have you hook up SYSRESETREQ from the processor to reset the system? (please make sure this should not reset debug logic, i.e. not use as power on reset).
In the Keil project, please also remove flash programming in debug option.
I don't Know how to hook up SYSRESETREQ from the processor to reset the system.Whether in SWDIOTMS input or normal run FLASH program, I see that SYSRESETREQ has been low level, do not know how to use. Could you help to tell me how to use hook up SYSRESETREQ from the processor to reset the system, or Or give me some information to study?
The system level RTL has a number condition compile codes like
This is needed as designstart eval possibly has different top level pins compared to full RTL.
If you are using DesignStart pro (full RTL) you don't need to set this macro.
I think you should set CORTEX_M0 in your synthesis.
Another thing to check is whether you have setup clock constraints for SWCLKTCK (missing clock contraints can also cause problem.).
If I set this macro in simulation and synthesis , is ok, right?
Yes, you need to set CORTEX_M0 in your synthesis.
You can set it in both simulation and synthesis environment.
Could you also check your Keil MDK project debug option - in debug probe setting, there might be choices of reset types: It should be SYSRESETREQ
I have set these macro , and re-synthesis.
And then choice of reset types: SYSRESETREQ.
But it failed again, and the info as follows:
This is not a failure message - this is expected because the flash programming option is removed in the debug option (you don't have flash memory in your FPGA).
I see, but I use RAM to equate FLASH memory. Can I download hex into RAM? Can I debug the gpogram used SWD? What should we do with KEIL in order to download programs to RAM? What should we do with SOC in order to download programs to Flash memory(RAM in FPGA)?
Yes, you can download program image to an SRAM location and execute and debug it using SWD.
By the way, which FPGA board are you using? And which debug probe? (ULINK? I-Jet?)
My FPGA borad is Xilinx's XC7Z020, debug probe is ST-LINK V2.
I am not sure if you can use ST-LINK to program non ST devices. In the past I saw some forum posts said that the probe is locked down to ST device only
You might need to get a different debug adapter for your FPGA project.
OK, I see， which debug probe that you recommend?
It depends on your budget. If you want something really low cost, you can get a CMSIS-DAP from Adafruit
For educational use, J-LINK EDU is also affordable
For professional software development, I use ULINK Pro (http://www2.keil.com/mdk5/ulink) , but there are also others with many features:
J-Trace : https://www.segger.com/products/debug-probes/j-trace/models/j-trace/
I-Jet Trace : https://www.iar.com/iar-embedded-workbench/add-ons-and-integrations/in-circuit-debugging-probes/
Lauterbach u-Trace for Cortex-M : https://www.lauterbach.com/microtrace.html
We use ULINK to download program image to FPGA, but fail again, the Error Info and setup as follow :
You need to remove the STM32 flash option from your project. Otherwise the IDE will try to use the STM32 flash algorithm to to program verification which won't work on your FPGA.
And yes, you can use 3rd party debug probes for flash programming. If you are a SoC designer, and creating your own MCU, you need to create your flash algorithm. There is a template in
Yes，we first remove the STM32 flash option, but I don't know if the download have successful. So, I hope you tell us,can we directly access FLASH, to debug the SOC system?For our SOC FLASH access system, do we need to do anything with probe? Do we need to design for SWD in SOC?
If we don't use STM32 flash algorithm , which algorithm to write memory? For example, which address we should write?
For FPGA prototype, after you entered debug view in Keil MDK, you can save the memory content using save command
For SoC design with embedded flash, you need to discuss with the embedded flash provider to see what they can provide. The STM32 flash algorithm in Keil MDK is designed to work with embedded flash controller designed by ST, and your flash controller is likely to be different so cannot be reused.
Potentially you need to create you own flash controller algorithm from scratch unless the embedded flash provider provide you the code. Please has a look at:
And the template in you Keil MDK installation (C:\Keil_v5\ARM\Flash\_Template)
You might also like to have a look at one of Arm's IP call CoreLink SDK 101 which has a flash controller