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Yasuhiko Koumoto

Yasuhiko Koumoto

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  • Answered

    Why does ARM have 64KB Large Pages? +1

    • Arm7
    • Memory Management Unit (MMU)
    5614 views
    3 replies
    Latest over 1 year ago
     by Zenon Xiu (修志龙）
  • Answered

    The Monitor 0

    • TrustZone
    8671 views
    4 replies
    Latest over 2 years ago
     by yufeifei
  • Answered

    How long are the Cortex-M7 pipeline stages? 0

    • Cortex-M7
    • Cortex-M
    41483 views
    18 replies
    Latest over 2 years ago
     by Pacocha
  • Answered

    Cortex-A7 pipeline is non-symmetric, what does this attribute mean? 0

    • Cortex-A53
    • Cortex-A15
    • Cortex-A
    • Cortex-A7
    18577 views
    10 replies
    Latest over 2 years ago
     by Jerome Decamps - 杜尚杰
  • Answered

    AXI4: Unaligned read transactions +1

    • AMBA
    • AXI4
    23465 views
    6 replies
    Latest over 2 years ago
     by Vishal Abrol
  • Answered

    Cortex-M0: How to switch from one program to another 0

    • Cortex-M0
    • Cortex-M
    42299 views
    21 replies
    Latest over 2 years ago
     by tony philipsson
  • Answered

    How to do the ARM state change between 64-bit and 32-bit? 0

    • 32-bit
    • AArch64
    • Armv8-A
    • 64-bit
    • AArch32
    87765 views
    10 replies
    Latest over 3 years ago
     by Su40mmer
  • Answered

    How to get started with ARM Cortex-M, RTOS, Linux? +3

    • Cortex-M
    95522 views
    21 replies
    Latest over 3 years ago
     by Pieter Kruger
  • Answered

    A TCM problem 0

    • Arm11
    9531 views
    8 replies
    Latest over 3 years ago
     by swanw
  • Answered

    can we delay read and write transactions(axi4) by providing delay in register slice? 0

    • AXI4
    112596 views
    67 replies
    Latest over 3 years ago
     by casseverhart13
  • Answered

    How to set secondary core's registers from primary arm? 0

    • Cortex-A15
    • Cortex-A
    38456 views
    12 replies
    Latest over 3 years ago
     by 42Bastian Schick
  • Not Answered

    ARM MUL instruction 0

    • Cortex-A
    • Cortex-A7
    22119 views
    13 replies
    Latest over 4 years ago
     by Sean Dunlevy
  • Suggested Answer

    return from secure function to non-secure, why r4-r11 register not being cleared 0

    • TrustZone
    • Armv8-M
    9468 views
    4 replies
    Latest over 4 years ago
     by Wenchuan2018
  • Not Answered

    Interrupts from the secure world to the non-secure world. 0

    • iOS
    • TrustZone
    • Armv8-M
    15844 views
    11 replies
    Latest over 4 years ago
     by Joseph Yiu
  • Answered

    Atmel SAM4E Bootloader/VTOR executing new application 0

    • Cortex-M
    • Cortex-M4
    46456 views
    18 replies
    Latest over 4 years ago
     by JoePapst
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