<?xml version="1.0" encoding="UTF-8" ?>
<?xml-stylesheet type="text/xsl" href="https://community.arm.com/utility/feedstylesheets/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/"><channel><title>WillSmithdasdasdasd's Groups Activities</title><link>https://community.arm.com/members/willsmithdasdasdasd</link><description>Recent activity for people in WillSmithdasdasdasd's group</description><dc:language>en-US</dc:language><generator>Telligent Community 10</generator><item><title>How to handle a AArch64.SystemAccessTrap(EL2, 0x18) in baremetal?</title><link>https://community.arm.com/developer/tools-software/tools/f/arm-compilers-forum/47624/how-to-handle-a-aarch64-systemaccesstrap-el2-0x18-in-baremetal</link><pubDate>Sun, 13 Sep 2020 17:52:48 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:5c07c916-8378-4fc4-b9db-2da8164fc9cd</guid><dc:creator>WillSmithdasdasdasd</dc:creator><description>&lt;p&gt;I am trying to do follow this tutorial on baremetal code (&lt;a href="https://github.com/s-matyukevich/raspberry-pi-os/blob/master/docs/lesson03/rpi-os.md"&gt;https://github.com/s-matyukevich/raspberry-pi-os/blob/master/docs/lesson03/rpi-os.md&lt;/a&gt;) using QEMU. Specifically, starting at EL1, I&amp;#39;m trying to handle an exception at EL2 and then return to EL1.&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;To accomplish this, I&amp;#39;ve set the HCR_EL2.TRVM bit to 1 and then I call asm(&amp;quot;msr x0, SCTLR_EL1&amp;quot;) in my C code, which should (according to the documentation), cause&lt;/p&gt;
&lt;pre class="codeblock"&gt;AArch64.SystemAccessTrap(EL2, 0x18);&lt;/pre&gt;
&lt;p&gt;to occur.&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;However, how would I catch this SystemAccessTrap and proceed to do something with it (in my case, I&amp;#39;d just want to print out the current exception level - which would be 2 while handling the exception - and then return)?&lt;/p&gt;
&lt;p&gt;&lt;/p&gt;
&lt;p&gt;I&amp;#39;m not sure if a SystemAccessTrap is a synchronous exception, and if it is, how to handle it at EL2 (which I assume I&amp;#39;d need to implement given that the asm command will force an EL2 access due to the TRVM bit being set).&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>Ask A Question I</title><link>https://community.arm.com/achievements/460ac7df-7ccc-4c42-a204-9e05eef3be09</link><pubDate>Sun, 13 Sep 2020 17:52:49 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:8d33f716-edfa-4909-a2d6-c4562022eae7</guid><dc:creator /><description>Ask a question in a forum.</description></item></channel></rss>