I am a Senior Research Engineer with the ML Research Lab at Arm. I am working at enabling efficient execution of Deep Learning (DL) on small devices. I have investigated structured and tensor decomposition algorithms to compress NN, training hardware friendly RNN Cells, scheduling RNNs on multicore CPU, developing accelerators for CNNs and benchmarking DL applications to isolate performance bottlenecks.
In my previous employement, I have worked as a performance architect for indirect branch predictors at AMD and as a verification and design engineer for memory controllers, H.264 video encoder decoder and neural network accelerator at Texas Instruments.
I did my Masters in Computer Sciences from University of Wisconsin Madison, USA and my Bachelors in Electrical and Electronics Engineering from Birla Institute of Technology and Sciences, Pilani, India.
External Webpage with list of publications- https://urmish.github.io/
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