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Reiley Jeyapaul

Reiley Jeyapaul

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About Reiley Jeyapaul

Reiley earned his PhD in Computer Science (2012) with Prof. Aviral Shrivastava, and MS in Electrical Engineering (2008) from Arizona State University. He has been associated with the Compiler Microarchitecture Lab at ASU as a Research Associate since Aug 2006, and a post-doctoral researcher from 2012-2015. Prior to this this, Reiley graduated from the University of Madras, India with a Baccalaureate degree in engineering in 2004, and joined L&T Infotech, India as a software engineer.

He is part of the Architecture group in Arm Research and is interested in finding ways to achieve error-free computing. His other interests include reconfigurable heterogeneous computing, system co-design. His current research focus is in developing analytical methodologies

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  • Birthday: May 3, 1982
  • Language: U.S. English
  • Job Title: Sr. Research Engineer
  • Company: Arm Ltd
  • Profession: Research/Teaching
  • City: Austin
  • Country: United States of America
  • Website: https://www.researchgate.net/profile/Reiley_Jeyapaul
  • Public Email: reiley.jeyapaul@arm.com
  • Phone number: 5128909373
  • Twitter: https://twitter.com/ReileyJeyapaul
  • LinkedIn: https://www.linkedin.com/in/reileyjeyapaul/
  • Github: https://github.com/reileyj
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