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Matt Sealey

Matt Sealey

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  • Answered

    How to set inner of outer shareability on page table entry WITHOUT TEX remap?? 0

    • Cortex-A
    • TrustZone
    3959 views
    3 replies
    Latest over 5 years ago
    by Matt Sealey
  • Not Answered

    Compatibility between gcc-arm and ds-5 compiler 0

    • Toolchain
    • gcc_toolchain_ds-5
    • GCC
    • arm-gcc
    • DS-5 Ultimate Edition
    • compatibility
    3676 views
    1 reply
    Latest over 5 years ago
    by Matt Sealey
  • Answered

    The madman strikes again - ADD/SUB SP 0

    • Thumb
    • Cortex-A
    • Cortex-A7
    3759 views
    9 replies
    Latest over 5 years ago
    by Juha Aaltonen
  • Answered

    Why does Cortex-R kernel only support Thumb-2? 0

    • Cortex-R
    • Cortex-A
    • Thumb2
    3863 views
    4 replies
    Latest over 5 years ago
    by Kun.Niu
  • Suggested Answer

    Address Space Identifier - ASID +1

    • Armv7-A
    • Armv7-R
    • Linux
    20493 views
    2 replies
    Latest over 5 years ago
    by Mike Clark
  • Answered

    Why or how does SysTick interrupt wakeup the processor? 0

    • Cortex-M0
    • Cortex-M
    14566 views
    10 replies
    Latest over 5 years ago
    by Yasuhiko Koumoto
  • Answered

    UPREDICTABLE instructions 0

    • Armv7-A
    • Armv7-R
    • Thumb
    4878 views
    8 replies
    Latest over 5 years ago
    by Juha Aaltonen
  • Answered

    ARM FULL VIRTUALISATION SOFTWARE 0

    • Cortex-A17
    • Cortex-A
    5851 views
    7 replies
    Latest over 5 years ago
    by Mike Clark
  • Not Answered

    Cortex-A5 sets instr_pc to 0x00000008 after enabling MMU and using high exception vectors 0

    • Armv7-A
    • Cortex-A5
    • arm926ej-s
    • Cortex-A
    • Armv5
    7166 views
    14 replies
    Latest over 5 years ago
    by Yasuhiko Koumoto
  • Answered

    how to bypass BL3-1 arm-trusted-firmware running on Juno 0

    • Juno Arm Development Platform
    • arm-trusted-firmware
    4027 views
    7 replies
    Latest over 5 years ago
    by armdev
  • Answered

    Problem with storing data instruction STR (ASM) 0

    • Cortex-M
    21738 views
    16 replies
    Latest over 5 years ago
    by Jerome Decamps - 杜尚杰
  • Answered

    Cortex-A7 initialization code & TrustZone/ Secure Boot 0

    • Raspberry Pi
    • Cortex-A
    • Cortex-A7
    • TrustZone
    11123 views
    5 replies
    Latest over 5 years ago
    by Vincent Siles
  • Answered

    Cache and store buffer maintenance in cortex-a8! 0

    • Armv7
    • Cache coherency
    • Cortex-A
    • Cortex-A8
    5532 views
    6 replies
    Latest over 6 years ago
    by Hamed
  • Answered

    How to load Linux kernel image onto ARM Cortex-A9 target using DSTREAM debugger? +1

    • Cortex-A9
    • DSTREAM
    8370 views
    5 replies
    Latest over 6 years ago
    by Scott Douglass
  • Answered

    armcc compile c   error  under DS-5 tool 0

    • Tool
    • ds-5
    • C++
    • compiler
    • Arm Compiler
    • GCC
    • open_source
    • GNU
    5401 views
    7 replies
    Latest over 6 years ago
    by zg
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