• A Beginner’s Guide on Interrupt Latency - and Interrupt Latency of the Arm Cortex-M processors

    Introduction

    All experienced embedded system designers know that interrupt latency is one of the key characteristics of a microcontrolller, and are aware that this is crucial for many applications with real time requirements. However, the descriptions…

  • ARMv6-M vs ARMv7-M - Unpacking the Microcontrollers

    This article is a follow-on to Navigating the Cortex Maze. As a high-level overview, the earlier article provides an easy way-in to the ARM processor range. It covers Cortex-A (architecture ARMv7-A), Cortex-R (ARMv7-R) and Cortex-M (ARMv7-M).

    But the…

  • Cortex M1, Cortex R4 - comparison

    Note: This was originally posted on 25th September 2009 at http://forums.arm.com

    Hi all,

    Iam studyng the features supported by Cortex M1 and Cortex R4 soft processors. I have created a table for this and there are some features which i could not find.…

  • Debugging a Cortex-M0 Hard Fault

  • Developing Jython scripts for DS-5: Translation Table Decoder

    This article was originally posted on 23 October 2012 on blogs.arm.com

    ARM DS-5TM is becoming a standard tool in the development of complex embedded software for ARM applications processors. The DS-5 debugger integrated in the Eclipse environment provides…

  • FPGA Prototyping walkthrough using Arm Cortex-M0 DesignStart and MPS2

    This article relates to AN387 Cortex-M0 DesignStart delivered with the MPS2 board.

    For Cortex-M0 DesignStart Eval (AT510) r2p0-00rel0, see the ”Arm Cortex-M0 DesignStart Eval FPGA Revision: r2p0 User Guide” document that is delivered as part of the AT510…