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Colin Campbell

Colin Campbell

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  • Answered

    AMBA +1

    • APB
    • AMBA
    • Bus Architecture
    9472 views
    1 reply
    Latest over 1 year ago
    by Colin Campbell
  • Answered

    Does AHB-Lite Protocol require the master processor to be pipelined? +1

    • AHB-Lite
    • Processor Architecture
    10259 views
    1 reply
    Latest over 1 year ago
    by Colin Campbell
  • Answered

    How do I add AHB interface to a processor with Load Store Architecture? 0

    • Processor Architecture
    • AMBA 2 AHB Interface
    • AHB
    10035 views
    2 replies
    Latest over 1 year ago
    by Kedhar Guhan
  • Not Answered

    State Machine for AHB-Lite Protocol 0

    • AHB-Lite
    • AHB
    10297 views
    3 replies
    Latest over 1 year ago
    by Colin Campbell
  • Answered

    [AXI protocol] Is a master allowed to disable byte lanes in a non-narrow WRAP burst? +1

    • AXI
    10127 views
    2 replies
    Latest over 1 year ago
    by Zax
  • Not Answered

    Assertion for Multiple Transfer on APB Bus 0

    • APB
    • AMBA
    • Bus Architecture
    9820 views
    2 replies
    Latest over 1 year ago
    by Rakesh Venkatesan
  • Answered

    What purpose do wrapping BURST transfers serve? +2

    • AHB-Lite
    • AHB
    11241 views
    1 reply
    Latest over 1 year ago
    by Colin Campbell
  • Answered

    HRANT assertion and deassertion in combination with HLOCK and HREADY +1

    • AMBA
    10058 views
    2 replies
    Latest over 1 year ago
    by Kavita Bhagnani
  • Answered

    Can a simple processor with load-store architecture support BURST? 0

    • AHB-Lite
    • Processor Architecture
    • AHB
    9428 views
    1 reply
    Latest over 1 year ago
    by Colin Campbell
  • Answered

    Why does an AHB slave require HBURST signal? 0

    • AHB
    • Memory
    10018 views
    1 reply
    Latest over 1 year ago
    by Colin Campbell
  • Answered

    What purpose does BURST feature in AHB serve? 0

    • Protocols
    • Architecture
    • AHB-Lite
    • Processors
    • AHB
    11161 views
    1 reply
    Latest over 1 year ago
    by Colin Campbell
  • Suggested Answer

    Is there any scenario where HWDATA and HRDATA are used simultaneously? 0

    • AMBA 3 AHB Interface
    8959 views
    1 reply
    Latest over 1 year ago
    by Colin Campbell
  • Answered

    Significance of [MS] and [LS] in big-endian data bus in AHB5 Specification +1

    • AMBA
    • AHB5
    • AMBA 5
    • AHB
    8524 views
    1 reply
    Latest over 1 year ago
    by Colin Campbell
  • Answered

    AHB5 did'nt mention SPLIT and RETRY responses 0

    • AHB5
    6937 views
    1 reply
    Latest over 1 year ago
    by Colin Campbell
  • Suggested Answer

    When should APB slave Sample address/Data for read/write transaction from APB master? 0

    13292 views
    5 replies
    Latest over 1 year ago
    by Colin Campbell
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