Brian Cline

I'm a Principal Research Engineer in the Devices, Circuits, and Systems (DCS) group in Arm Research. I lead a research thread in DCS called "Technology-Optimized Design," or TOD. The TOD group is responsible for identifying and tracking future manufacturing process technologies and assessing the potential impact on the Arm ecosystem (physical IP, processor IP, system IP, etc.). This includes technologies on the traditional CMOS roadmap, as well as identifying other disruptive process technologies (e.g., new devices, lithography, integration techniques, etc.) that could likely be adopted into high volume manufacturing in the future. Some examples of technologies we've looked at in the past include:

• FinFET transistors
• Lateral nanowire transistors
• Ge-based transistors
• EUV lithography
• DSA lithography
• Graphene interconnects
• 3D integration
• Spintronic devices

Our team has filed over 40 patents in related areas and published more than 25 papers at various conferences.