SummaryYou know the Cortex™-M4, M3, M1, M0 architecture and can write software in C and Assembler. You can place the programs in memory and test them. You get the perfect introduction in developing Cortex™-M based systems.
TypeSoftware and Hardware
Length (approx.)4 days
PrerequisitesA basic understanding of ANSI-C and microcontrollers.
AudienceHardware and software developers. IMPORTANT NOTE: Please contact us to verify the training language for the individual dates (German or English): email@example.com.
Cortex™-M (ARMv7-M, ARMv6-M) Processor Architecture - Register organization, special purpose register - Operation modes (handler/thread, privileged/unprivileged) - Main stack, process stack - Cortex™-M pipeline concept - Cortex™-M memory map, system control block, bit banding
ARM Processor Cores - Overview - Cortex™-M0, M1, M3, M4, R4, A8, A9 - ARM7/9/10/11
Cortex™-M4, M3, M1, M0 Instruction Set - Thumb-2 instruction set - Data processing instructions - Branch and control flow instructions, subroutines - Branch table, if ... then conditional blocks - Data access instructions - Assembler directives
Exception and Interrupt Handling - Exception model - Reset, NMI, faults, SysTick, debug, supervisor calls, external interrupts - Tail chaining, late arriving - Nested vector interrupt controller (NVIC) - Interrupt configuration and status - Interrupt prioritization, priority grouping
Reset Modes, Clock Generation, Power Management - Clock generation - Resets and Cortex™-M reset modes - Power management - System timer
Memory Interface - Bus interfaces for: AMBA 3 bus, instruction/data memories - System interface, external private peripherals
Memory Protection Unit MPU for Embedded Systems
Embedded Core Debugging - Core and system debugging - JTAG debug port - 2-pin single wire debug port - Trace port interface unit - Embedded trace macrocell
Embedded Software Development - Adjustment of library routines to hardware (retargeting) - Placing code and data in memory (scatter loading) - Linker description files - Processor start-up, start-up file - Tools: ARM, IAR, GNU
Efficient C Programming for Cortex Architectures - Compiler optimization, compiler options - Interface C - Assembler - Programming guidelines for Cortex compilers - Optimized utilization of local and global data - Tools: ARM, IAR, GNU
Hardware-near C Programming According to CMSIS - Cortex Microcontroller Software Interface Standard (CMSIS) - Software architecture for embedded systems - Structured description of peripherals - Access to peripherals in C - C statements and their execution in Assembler
Floating Point Unit, Digital Signal Processing
Practical Exercises with IAR Workbench, Atmel Studio 6 & ASF or Keil µVision and ARM RealView Tools - Exercises - key elements of the Cortex™-M4, M3, M1, M0 architecture - All programs are tested on an evaluation board - Cortex™-M4: Freescale Kinetis ARM Cortex™-M4 microcontrollers - Cortex™-M4: Atmel SAM4S EK2 Cortex™-M4 evaluation kit - Cortex™-M4: Atmel SAM4S Xplained Cortex™-M4 evaluation kit - Cortex™-M3: NXP LPC1700 family, STMicroelectronics STM32 family - Cortex™-M3: Spansion FM3 family - Cortex™-M4: Spansion FM4 family - Cortex™-M0: Nuvoton NuMicro™ family - Alternative tools can be used on request
Participants get a FREE Nuvoton Cortex™-M0 development kit (NuMicro-SDK), Fujitsu FM3 starter kit, Infineon XMC4500 Relax Kit (Cortex™-M4) or Atmel SAM4S Xplained Cortex™-M4 evaluation kit.
Hi Sabine, is this a course part of the ARM Approved Training Center program? If so, I would advise you add the associated tag to make it easier to find: arm_approved_training_center