How interrupts are routed in EL3/EL2/EL1 mode

Sorry for basic question, 

For ARM64, we have different interrupt vector table for each mode EL3/EL2/EL1 

I am wondering, how a specific IRQ is routed to given mode. 

in GIC, I am not able to find such relation 

Thanks

Udit

Parents
  • The routing of interrupts (IRQs and FIQs) is controlled by two registers: HCR_EL2 and SCR_EL3.

    In SCR_EL3, the IRQ and FIQ bits control which interrupts cause entry to EL3

    In HCR_EL2, the IMO and FMO bits control which interrupts cause entry to EL2.

    If you try to set the routing bits for sat IRQs in SCR_EL3 and HCR_EL2, SCR_EL3 wins.

    If you've not routed the interrupt type to either EL2 or EL3, then it defaults to being routed to EL1.

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  • The routing of interrupts (IRQs and FIQs) is controlled by two registers: HCR_EL2 and SCR_EL3.

    In SCR_EL3, the IRQ and FIQ bits control which interrupts cause entry to EL3

    In HCR_EL2, the IMO and FMO bits control which interrupts cause entry to EL2.

    If you try to set the routing bits for sat IRQs in SCR_EL3 and HCR_EL2, SCR_EL3 wins.

    If you've not routed the interrupt type to either EL2 or EL3, then it defaults to being routed to EL1.

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