Vector Table for ARMv8 (cortex A57)

Hi,

 

How do i configure vector table for cortex A-57?

From the documents - "The vector table has 16 entries, with each entry being 128 bytes (32 instructions) in size. The table effectively consists of 4 sets of 4 entries"

Also " Virtual address of each table base is set by the Vector Based Address Registers VBAR_EL3, VBAR_EL2 and VBAR_EL1.".

So, do i need different vector table for each exception level EL0, EL1, EL2 and EL3? Am i to set the same vector base address for all the above base address registers?

Or Is it like, each set of 4 entries in the vector table belong to a particular exception level? 

Please help, I am really confused now.

 

Regards,

Ajeesh