FVP Cortex R52

Hello Jason,

thank you for your response. The problem was that the GIC CPU Interface is not memory mapped.

Is there an issue with the GICR_ISENABLER0 register? I noticed that I cannot write to this register with my software or even with a Lauterbach debugger. This one register is also not included in the peripheral description from Lauterbach.

I attempt to write to the register in hypervisor/EL2 level.

Thank you in advance!

Regards,

Tibor

Hello Jason,

thank you for your response. The problem was that the GIC CPU Interface is not memory mapped.

Is there an issue with the GICR_ISENABLER0 register? I noticed that I cannot write to this register with my software or even with a Lauterbach debugger. This one register is also not included in the peripheral description from Lauterbach.

I attempt to write to the register in hypervisor/EL2 level.

Thank you in advance!

Regards,

Tibor

Hi Tibor,

To confirm the GIC memory mapping I recommend to try to read a register with a non-zero reset value. 

For example, I tried the Cortex-R52 software example which comes with DS-5, the name is startup_Cortex-R52

I put a read of the GICD_CTRL register which has a reset value of 0x50:

/* Display a welcome message via semihosting */
printf("Cortex-R52 bare-metal startup example\n");

gic_ctlr = *((unsigned long *)0xAF000000);
printf("ctlr %x\n",gic_ctlr);

I rebuilt the software and ran the FVP again and I can see the value of 0x50 is printed.

$ ./FVP_BaseR_Cortex-R52x1 -a /home/jasand01/startup_Cortex-R52.axf 

Cortex-R52 bare-metal startup example
ctlr 50
Floating point calculation using the FPU...
Float result is 0.937500
Float result should be 0.937500
Insertion sort took 2 clock ticks
Shell sort took 0 clock ticks
Quick sort took 1 clock ticks

Based on this I feel like the GIC is in the memory map at 0xAF000000 and is visible to software. 

Can you provide more info about how you are trying to access the GIC which is not working for you?

Thanks,

Jason

Hello Jason,

according to the R52 technical reference manual, the CPU Interface of the GIC is not memory mapped and can only be accessed with mcr or mrc instruction. The GIC distributor and redistributor are memory mapped.

The problem I have is, I cannot write in the specific register of the redistributor: GICR_ISENABLER0, although I can read or write to the other registers of the redistributor.

I need to write to this register in order to enable PPI IRQs from the ARM generic timer. At the moment, SPI IRQs are working fine, but I need to use PPI IRQs also.

Can you please check if you have any issues when writing to this register GICR_ISENABLER0? I tried writing with the Lauterbach debugger, pointer to memory or str instruction. The register should be located at 0xAF10 0100.

Thank you in advance!

Regards,

Tibor

I figured it out, there was an additional offset required. Thank you for your support!