I'm looking forward to the Synopsys Users' Group (SNUG) Silicon Valley this week. I hope I'll get to see some of you there. Maybe 3GHz+ will get your attention? Read on...
It's always a great (and huge) gathering of leading edge designers sharing about their leading edge designs -- challenges, solutions, warts and all. That's the hallmark of SNUG - deep technical content, and a lot of it. SNUG is the event where designers learn, share and engage.
Thank you, ARM, for being a global Platinum Sponsor of SNUG - you'll see ARM participation in SNUG events worldwide. In preparation for SNUG, I sat down with Dipesh Patel, ARM EVP incubation businesses, and he shared his thoughts in two short videos, one on collaboration with Synopsys and another on what SNUG means to him and ARM.
In the videos, Dipesh comments on:
- Collaborating with Synopsys to optimize ARM®Cortex® & Mali® processor PPA using ARM Artisan® POP™ IP & Synopsys IC Compiler® II
- Verifying ARM's IP and subsystems using Synopsys HAPS® FPGA-based prototyping and ZeBu® emulation to increase the number of scenarios and verification cycles that ARM can run
- Ensuring the security and quality of ARM's mbed™ OS for its customers with Synopsys static (Coverity®) and dynamic (Defensics®) software integrity tools
- Looking forward to deep technical presentations and interacting with SNUG attendees to get insights into design challenges & real solutions
SNUG worldwide kicks off March 31, 2016 in Silicon Valley (Santa Clara Convention Center) for a two day run. There's great content for everyone, implementation, verification, security, and IP, and many presentations are especially relevant to ARM-based designs.
Here are a few ARM-related presentations that I plan to attend:
- Optimized Implementation of 3GHz+ ARM® CPU Cores in FinFET Technologies (Broadcom)
- Best Practices for High-Performance, Energy Efficient Implementations of the Latest ARM Processors in 16-nanometer FinFET Plus (16FF+) Process Technology using Synopsys Galaxy Design Platform [Ok, a mouthful, but this session will cover lessons learned not only from Cortex-A72 implementation, but also the latest, not-yet-announced ARM application CPU]
- Best Practices for a Performance and Area Focused Implementation of High-Performance GPUs Using Galaxy Design Platform
- VIrtual Platform Methodology for Large Scale Pre-Silicon SW Development (Broadcom)
- High Level Performance Estimation on Virtual Prototypes Employing Timing Annotation (ARM)
- Writing Efficient Timing Constraints and Accelerating Timing Closure with PrimeTime (ARM)
Visit our SNUG Silicon Valley website to see the full technical and social program.
Hope to see you there! If you can't make it, check back at the Synopsys SNUG website to see archived papers and presentations.