Reduced effort and risk for building 4K displays in high-end smartphones and AR/VR devices

In their recent article in Semiconductor Engineering (Arm) and Licinio Sousa (Synopsys) illustrate different display subsystem architecures and describe an interoperable Arm display processing unit (DPU) plus Synopsys MIPI Display Serial Interface (DSI) IP solution that enables 4k embedded displays for smartphones and AR/VR devices.

Configurations for various applications

In their article, they describe various IP configurations combining the Arm Mali-D71 and the Synopsys DesignWare MIPI DSI cores to address different application needs.

Here the two blocks are combined in an application processor along with other key Arm IP elements:

The Arm Mali-D71 DPU is a fundamental processor and GPU companion in a multimedia subsystem that works seamlessly behind the Android Hardware Composer HAL (HWC). Mali-D71 connects to the display device through the display serial interface like the MIPI DSI. The Synopsys’ MIPI DSI Controller is a fully verified and configurable IP that converts the incoming pixel data, which in this case is Arm’s DPU, into MIPI DSI packets which are transmitted to the MIPI D-PHY link connecting to the embedded display.

Configuration example of a WQHD display at 60Hz with 24 bits per pixel (bpp) needing 6.3Gbps to transfer data from the application processor to the display device

A 4K display resolution at 90Hz with 30 bpp requires 26.6Gbps bandwidth with two display drivers and associated MIPI display interfaces.

The display drivers synchronize to enable the two halves of the image to display properly.

Interoperable cores for video and command mode displays

Arm and Synopsys have collaborated to ensure Arm Mali DPU and Synopsys DesignWare DSI Controller IP, with DSC encoder, are fully interoperable for both video and command mode displays. Besides the fundamental clock and reset control, the companies provide the detailed interface connectivity, including all the IP-specific slide band signals for each display mode in both single and dual link mode of operation. Dual link operations double the available bandwidth, which is particularly important for ultra-high-resolution applications. Here the numerous resolutions that the interoperable embedded display solution supports:

Where to go for more information:

If you are building an SoC requiring high resolution display, I highly recommend reading the article and requesting the comprehensive application note on Arm Mali-D71/Synopsys DesignWare MIPI DSC interoperability that's available under NDA.

Contact Synopsys for more information or visit DesignWare MIPI DSI Host Controllers and the Mali-D71 DPU web pages.

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