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Operating Systems forum
The latest forum discussions for all Arm technology relating to Operating Systems (OS)
272
questions
UEFI variables from UEFI shell
2 months ago
Servers and Cloud Computing forum
The latest forum discussions about the Arm Servers and Cloud Computing ecosystem for cloud native edit to cloud application development and deployment.
101
questions
RE: ArmRAL: Wrong usage of k0 in LDPC rate matching
5 months ago
SoC Design and Simulation forum
The latest forum discussions for community-based support for System-on-Chip (SoC) and Arm simulation models.
707
questions
In CHI how the Slave side is giving the L-Credits to the Master Side
18 hours ago
SystemReady Forum
The SystemReady forum covers all aspects of the Arm SystemReady compliance program, including associated specifications (BSA, SBSA, BBR), Architecture Compliance Suite (ACS) testing, and implementation considerations for pre-silicon and SystemReady bands.
15
questions
RE: How to run ARM ACS
4 months ago
恩智浦汽车电子MCU讨论区博
4
questions
RE: [TRK-KEA64使用经验分享] 开箱体验 亮瞎我的双眼
over 9 years ago
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Suggested Answer
Transfer size in AMBA AXI
+1
AMBA
AXI
14561
views
2
replies
Latest
over 7 years ago
by
Colin Campbell
Not Answered
Access through Hostname from Linux system
0
Keil MDK
1938
views
4
replies
Latest
over 7 years ago
by
blueshift Girish
Not Answered
add project CFLAGS to CMSIS-PACK Project Description (*.CPDSC)
0
CMSIS
2590
views
1
reply
Latest
over 7 years ago
by
Jonatan Antoni
Not Answered
error: #5: cannot open source input file
0
Microcontroller (MCU)
11447
views
1
reply
Latest
over 7 years ago
by
Westonsupermare Pier
Not Answered
Ulink2 and NVMCTRL_EEPROM_SIZE fuse on ATSAMD20E18 (Cortex M0)
0
Microcontroller (MCU)
968
views
0
replies
Started
over 7 years ago
by
Jan Valik
Answered
Cortex A53 : Cache policy setting
0
Cortex-A53
Cache
Cortex-A
8709
views
4
replies
Latest
over 7 years ago
by
MarekBykowski
Not Answered
Breakpoint set function execute issue
0
Keil C166 Tools
987
views
0
replies
Started
over 7 years ago
by
P J Anantha Krishnan
Not Answered
can't change the font
0
Keil MDK
1351
views
2
replies
Latest
over 7 years ago
by
Jackson Lin
Not Answered
Building position independent binary
0
cortex-m4f
Cortex-M
12113
views
4
replies
Latest
over 7 years ago
by
42Bastian Schick
Not Answered
Does Aarch64 LDTR behave differently in secure vs non-secure?
0
AArch64
Memory Management Unit (MMU)
C
9057
views
3
replies
Latest
over 7 years ago
by
42Bastian Schick
Not Answered
How to invalidate cache (NVIDIA Drive PX2, ARMv8)
0
Cache coherency
Memory Management Unit (MMU)
13488
views
8
replies
Latest
over 7 years ago
by
Emme92
Answered
MALI T760MP4 L2 cache hit ratio low (64%)
+1
Midgard
Streamline
Mali-T760
Mali-GPU
6172
views
1
reply
Latest
over 7 years ago
by
Peter Harris
Not Answered
Problems with the virtual serial Port for UART
0
Keil MDK
3798
views
1
reply
Latest
over 7 years ago
by
Ron Wedge
Answered
Regarding WRAP burst calculation in AXI4
0
AMBA
AXI4
Interface
8395
views
2
replies
Latest
over 7 years ago
by
pavan316
Suggested Answer
Why linux set memory as inner shareable in multi-cluster ARMv8 cores?
0
Cortex-A53
Cortex-A57
Cache coherency
Armv8-A
Cortex-A
13522
views
7
replies
Latest
over 7 years ago
by
thomas_cp
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