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Forums

  • Operating Systems forum

    The latest forum discussions for all Arm technology relating to Operating Systems (OS)
    272 questions
    Cantaff0rd
    UEFI variables from UEFI shell 2 months ago
  • Servers and Cloud Computing forum

    The latest forum discussions about the Arm Servers and Cloud Computing ecosystem for cloud native edit to cloud application development and deployment.
    101 questions
    romain beurdouche
    RE: ArmRAL: Wrong usage of k0 in LDPC rate matching 5 months ago
  • SoC Design and Simulation forum

    The latest forum discussions for community-based support for System-on-Chip (SoC) and Arm simulation models.
    705 questions
    Rishi Cheriyan
    Compatibility of PWAKEUP of APB completer with Q-channel compliant clock controller 5 days ago
  • SystemReady Forum

    The SystemReady forum covers all aspects of the Arm SystemReady compliance program, including associated specifications (BSA, SBSA, BBR), Architecture Compliance Suite (ACS) testing, and implementation considerations for pre-silicon and SystemReady bands.
    15 questions
    vstehle
    RE: How to run ARM ACS 4 months ago Arm Employee Badge
  • 恩智浦汽车电子MCU讨论区博

    4 questions
    Song Bin 宋斌
    RE: [TRK-KEA64使用经验分享] 开箱体验 亮瞎我的双眼 over 9 years ago Arm Employee Badge
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All questions in this Community
  • Suggested Answer

    Reset button from IDE 0

    • Keil MDK
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    13 replies
    Latest over 6 years ago
    by Robert McNamara
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    Test to Verify the Keil Migration Form name Changed 0

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    Latest over 6 years ago
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    Cortex-M: Does the event register only get set when an IRQ changes from not pending to pending? 0

    • Interrupt Handling
    • event
    • Cortex-M4
    7392 views
    3 replies
    Latest over 6 years ago
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  • Answered

    Is CPSR.F settable through debug port? (e.g. JTAG) +1

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    • CPSR
    • Debugging
    5964 views
    3 replies
    Latest over 6 years ago
    by 42Bastian Schick
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    • stm32cube
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    5 replies
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    by Andy Neil
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    2580 views
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    Latest over 6 years ago
    by Andy Neil
  • Suggested Answer

    The meanings of AxCACHE 0

    19638 views
    1 reply
    Latest over 6 years ago
    by Christopher Tory Arm Employee Badge
  • Suggested Answer

    CoreLink NIC-400 Interconnect gives an extra request 0

    • CoreLink NIC-400 Network Interconnect
    15434 views
    1 reply
    Latest over 6 years ago
    by Christopher Tory Arm Employee Badge
  • Suggested Answer

    Is there a limit for AXI4 outstanding transaction? 0

    • AXI4
    21082 views
    1 reply
    Latest over 6 years ago
    by Christopher Tory Arm Employee Badge
  • Not Answered

    gcc-arm-none-eabi-8: GDB segmentation fault +1

    • Toolchain
    • LLVM
    • GCC
    8213 views
    3 replies
    Latest over 6 years ago
    by Alan Hayward Arm Employee Badge
  • Answered

    How to trigger a Lisa+ model behaviour through a slave port <signal>? 0

    17835 views
    2 replies
    Latest over 6 years ago
    by Ramarro
  • Answered

    Instruction Fault Generation +1

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  • Answered

    Uniform blocks can't be read on Galaxy S6(Mali-T760 MP8) +1

    27025 views
    2 replies
    Latest over 6 years ago
    by Peter Harris Arm Employee Badge
  • Answered

    Render bug on Mali-T760 +1

    • Android OpenGL ES
    • Mali GPU (Midgard Architecture)
    • rendering
    30092 views
    3 replies
    Latest over 6 years ago
    by Peter Harris Arm Employee Badge
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