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Forums

  • Servers and Cloud Computing forum

    The latest forum discussions about the Arm Servers and Cloud Computing ecosystem for cloud native edit to cloud application development and deployment.
    101 questions
    romain beurdouche
    RE: ArmRAL: Wrong usage of k0 in LDPC rate matching 7 months ago
  • SoC Design and Simulation forum

    The latest forum discussions for community-based support for System-on-Chip (SoC) and Arm simulation models.
    710 questions
    Toshihisa Oishi
    RE: How to enable lumex FVP cache_state_model ? It seems slc cache could not be modelld? 35 minutes ago Arm Employee Badge
  • SystemReady Forum

    The SystemReady forum covers all aspects of the Arm SystemReady compliance program, including associated specifications (BSA, SBSA, BBR), Architecture Compliance Suite (ACS) testing, and implementation considerations for pre-silicon and SystemReady bands.
    15 questions
    vstehle
    RE: How to run ARM ACS 6 months ago Arm Employee Badge
  • TOSA forum

    Tensor Operator Set Architecture (TOSA) provides a set of whole-tensor operations commonly employed by Deep Neural Networks.
    1 question
    Oliver Beirne
    RE: Forum FAQs 1 month ago Arm Employee Badge
  • 恩智浦汽车电子MCU讨论区博

    4 questions
    Song Bin 宋斌
    RE: [TRK-KEA64使用经验分享] 开箱体验 亮瞎我的双眼 over 10 years ago Arm Employee Badge
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All questions in this Community
  • Answered

    Built Aborted Error +1

    1297 views
    2 replies
    Latest over 3 years ago
    by rkopsch Arm Employee Badge
  • Answered

    What does "Sample test cull rate" mean? +1

    • arm streamline
    10924 views
    3 replies
    Latest over 3 years ago
    by avi9111
  • Answered

    Provision to get out of BKPT instruction +1

    14247 views
    10 replies
    Latest over 3 years ago
    by garkbeda43
  • Answered

    What is in the first Morello GNU Tool Chain release? 0

    1748 views
    1 reply
    Latest over 3 years ago
    by Mark Inskip Arm Employee Badge
  • Suggested Answer

    mm_shuffle_epi8 equivalent on ARM machines 0

    • ARM.com
    2377 views
    1 reply
    Latest over 3 years ago
    by Ben Clark Arm Employee Badge
  • Answered

    Baremetal TFA payload built for capability mode still in PSTATE a64 on EL2 entry +1

    3539 views
    3 replies
    Latest over 3 years ago
    by Jen J
  • Answered

    In CM7, how NVIC distinguishes pulse and level interrupts? 0

    • Interrupt Handling
    • Cortex-M
    2018 views
    1 reply
    Latest over 3 years ago
    by Mahmood Yakub Arm Employee Badge
  • Not Answered

    mm_shuffle_epi8 equivalent on ARM machines 0

    1929 views
    1 reply
    Latest over 3 years ago
    by WestfW
  • Suggested Answer

    Can't get trial for DS-5 with error: " Server Error (500) " +2

    • DS-5 Development Studio
    • Tool Licensing
    9157 views
    5 replies
    Latest over 3 years ago
    by Stephen Theobald Arm Employee Badge
  • Suggested Answer

    DS-5 Arm Evaluation License: Unable to execute remote query (response code 503) 0

    1288 views
    2 replies
    Latest over 3 years ago
    by Stephen Theobald Arm Employee Badge
  • Suggested Answer

    Too low speed inference of CNN in a i.mx6 Cortex A9 (TVM) 0

    4441 views
    4 replies
    Latest over 3 years ago
    by Brian859
  • Suggested Answer

    Some Questions About Vela Compiler Report 0

    2842 views
    1 reply
    Latest over 3 years ago
    by Sandeep Singh Arm Employee Badge
  • Suggested Answer

    can't cross compile on arch linux 0

    2603 views
    2 replies
    Latest over 3 years ago
    by Stam Markianos-Wright Arm Employee Badge
  • Not Answered

    Issue with GICv3 ICC_IGRPEN1_EL1.Enable bit in Foundation Platform 0

    • GICv3/v4
    • Armv8 Foundation Platform
    1139 views
    0 replies
    Started over 3 years ago
    by josecm
  • Answered

    How to connect peripherals in CoertexR5 processor? And also how many possible ways of connecting them? +1

    • Cortex-R5
    • Armv7-R
    1617 views
    2 replies
    Latest over 3 years ago
    by Buvanesh
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