Forums

Operating Systems forum

The latest forum discussions for all Arm technology relating to Operating Systems (OS)

272 questions

UEFI variables from UEFI shell 3 months ago
Servers and Cloud Computing forum

The latest forum discussions about the Arm Servers and Cloud Computing ecosystem for cloud native edit to cloud application development and deployment.

101 questions

RE: ArmRAL: Wrong usage of k0 in LDPC rate matching 5 months ago
SoC Design and Simulation forum

The latest forum discussions for community-based support for System-on-Chip (SoC) and Arm simulation models.

707 questions

In CHI how the Slave side is giving the L-Credits to the Master Side 7 days ago
SystemReady Forum

The SystemReady forum covers all aspects of the Arm SystemReady compliance program, including associated specifications (BSA, SBSA, BBR), Architecture Compliance Suite (ACS) testing, and implementation considerations for pre-silicon and SystemReady bands.

15 questions

RE: How to run ARM ACS 4 months ago
恩智浦汽车电子MCU讨论区博

4 questions

RE: [TRK-KEA64使用经验分享] 开箱体验亮瞎我的双眼 over 9 years ago

All questions in this Community

Answered
How do I find out any information on running the SystemReady tests on a bare metal system without a Rich OS +1
2912 views

1 reply

Latest over 1 year ago
by dbrooke
Answered
Is there a minimum memory size for the kernel? Currently we are using 4GB of memory, do we need to increase this? +1
- SystemReady
2900 views

1 reply

Latest over 1 year ago
by dbrooke
Answered
What is the size of the SystemReady Architecture Compliance Suite (ACS) complete test code +1
- ACS
- SystemReady
2998 views

1 reply

Latest over 1 year ago
by dbrooke
Answered
The SystemReady ACS tests are generally run on a bare metal system. Can the ACS tests be run under a U-Boot bootloader shell +1
3085 views

1 reply

Latest over 1 year ago
by dbrooke
Answered
: In the pre silicon example I have, there is a PCIe exerciser imbedded in the emulation model that communicates with an API running on arm. If we have a real PCIe interface with a Mentor PCIe bridge, can we connect an external exerciser to it or must we +1
- Pre-Silicon
- SystemReady
2861 views

1 reply

Latest over 1 year ago
by dbrooke
Answered
How does BP131 Downsizer addressing work? 0
- PrimeCell BP131
1716 views

1 reply

Latest over 1 year ago
by Colin Campbell
Not Answered
Keil Microvision 5 with Compiler 5 giving license error 0
1253 views

1 reply

Latest over 1 year ago
by rkopsch
Answered
Duplicate IP address after changing the MAC address with netIF_SetOption +1
- Keil
- STM32 F1
- networking
- CMSIS
2216 views

4 replies

Latest over 1 year ago
by Volter_1122
Not Answered
mpidr doesn't work for all PE 0
- Cortex-A65
730 views

0 replies

Started over 1 year ago
by ele
Suggested Answer
Code Coverage using armclang 0
- Embedded Software
1876 views

1 reply

Latest over 1 year ago
by Ronan Synnott
Answered
Software level TrustZone for Cortex-M3/M4/M7 devices 0
2737 views

4 replies

Latest over 1 year ago
by Ronan Synnott
Not Answered

Guidance on Plugin Architecture for CORTEX-M7 Firmware with FreeRTOS, Supporting PIC and Distinct RAM for Code and Data 0

1230 views

0 replies

Started over 1 year ago
by mastupristi1
Answered

RTX5 training +1

785 views

2 replies

Latest over 1 year ago
by cfun
Suggested Answer

Reading register values on FVP 0

3807 views

3 replies

Latest over 1 year ago
by Jacob Bramley
Suggested Answer

how does processor identify itself 0

1042 views

1 reply

Latest over 1 year ago
by EllieC