I want to leave page 0 of this microcontroller free to enter or
not in the DFU boot.
I'm using the IROM1: modify feature to directly place the address I
want, but to no avail.
Could anyone tell me what I need to configure in keil for this to
Either change the linker script load region / execution region or
achieve the same using the GUI (Options->target page).
The processor starts at a specific address, data is suitably
mapped from the base of FLASH, RAM or ROM, at the zero address space
based on the state of the BOOTx pins in the case of ST designs.
This means a vector table needs to be at 0x08000000, it is not
going to see one at 0x08000400. You need a pair of vector entries at
0x08000000 for SP and PC, but these can point where you want. Or a
simple loader app to transfer control to you alternate starting
To change the vector table on this device you're going to need to
copy it to the base of RAM, and then remap the RAM at address space
zero. You should not let the linker use this RAM for applications
variables, so typically IRAM1 would now start at 0x200000C0
Look for ST's IAP (In App Programming) examples of how this is
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