Hello,
I am porting the RTX Kernel to a Cortex-M3 device and ran into a difficulty.
I have set up 2 tasks to toggle 2 LEDs to see if my tasks are running as expected. As below.
/*---------------------------------------------------------------------------- * Task 4 'blink_P2': Blink LED P2 *---------------------------------------------------------------------------*/ __task void blink_P2 (void) { os_itv_set (40); for (;;) { os_itv_wait (); Toggle_P2(); } } /*---------------------------------------------------------------------------- * Task 5 'blink_P3': Blink LED P3 *---------------------------------------------------------------------------*/ __task void blink_P3 (void) { os_itv_set (40); for (;;) { os_itv_wait (); Toggle_P3(); } }
If the time delay is set the same for both tasks then there is no problem. Both tasks toggle each LED at 40mS. This works.
However if I change the time delay on one task,(for example the second task to 50mS) then both tasks now take several seconds to toggle the LEDs.
I have ported the RTX kernel previously to an ARM7 core without difficulty but cannot see the problem on the Cortex-M3 ?
Can someone advise please ?
thanks!
velOSity RTOS www.ghs.com/.../velosity.html
Unlike other real-time operating systems that disable interrupts in every kernel service call, velOSity's state-of-the-art architecture guarantees the absolute minimum interrupt latency by never disabling interrupts in any service call.
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I am quite confused about that "never disabling interrupts". Does that mean, it does not disable interrupts in any critical sections?
www.padauk.com.tw/products.php
All series of PADAUK Proudcts are developed by FPPA technology. FPPA (Field Programmable Processor Array) is the technology to realize the truly parallel processing, multi-cores concept in one die. In FPPA architecture, all the processing cores can run its own program independently. Moreover, due to its supreme architecture, the power consumption will keep low.
One of the English Datasheets: www.padauk.com.tw/.../getfile.php
It seems that, some people prefer to use hardware power to solve the parallel processing problem. So they build an 8-core MCU (Field Programmable Processor Array), with such FPPA MCU, there is no latency for multi-tasking.
I don't think it means that. I think in kernel calls (eg. SVC calls) they have designed the OS to be re-entrant. (i.e. you can interrupt the kernel function with a hardware interrupt.
Just my guess, I know nothing about this OS.
KEIL RTX does the same. hardware interrupts are never disabled by the system
but you can disable them by your own whereever you like
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