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<?xml-stylesheet type="text/xsl" href="https://community.arm.com/utility/feedstylesheets/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/"><channel><title>Booting from external SPI Memory, LPC3250</title><link>https://community.arm.com/developer/tools-software/tools/f/keil-forum/38928/booting-from-external-spi-memory-lpc3250</link><description> 
Hi, 

 
I am using Phytec LPC3250 board with uVision IDE. 

 
I want my code to boot from an external SPI EEPROM that we
connected via the extension board. (Removing J16 jumper) I can
successfuly write and read the EEPROM. However, the boot does not</description><dc:language>en-US</dc:language><generator>Telligent Community 10</generator><item><title>RE: Booting from external SPI Memory, LPC3250</title><link>https://community.arm.com/thread/146580?ContentTypeID=1</link><pubDate>Thu, 12 Aug 2010 22:22:04 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:c32c3c92-9698-4d60-b40a-823fb28503f4</guid><dc:creator>Aykut Birsen</dc:creator><description>&lt;p&gt;&lt;p&gt;
I finally handled the problem.&lt;/p&gt;

&lt;p&gt;
Connecting a small resistance to the SPI1_DATIN pin the boot from
the external SPI flash works out!!&lt;/p&gt;

&lt;p&gt;
Thanks a lot for your helps.&lt;/p&gt;
&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Booting from external SPI Memory, LPC3250</title><link>https://community.arm.com/thread/144930?ContentTypeID=1</link><pubDate>Thu, 12 Aug 2010 08:10:26 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:bfb64ba2-bb83-433b-9956-794e7ba8a4ab</guid><dc:creator>Aykut Birsen</dc:creator><description>&lt;p&gt;&lt;p&gt;
To IB Shy:&lt;/p&gt;

&lt;p&gt;
I read that chapter many times. I know it has nothing to do with
the Phytec board but, as I can succeed something on that board, and
cannot succeed somewhere else it will be wise to see the difference
between the new environment and the Phytec board.&lt;/p&gt;

&lt;p&gt;
And finally, considering this, I saw that the EEPROM on the Phytec
board has a different communication procedure than the Flash I am
working on now.&lt;/p&gt;

&lt;p&gt;
To Do Per Westermark:&lt;/p&gt;

&lt;p&gt;
It is a good way to ask the company writing the bootloader but
they generally reply too late, therefore I prefer writing and
discussing here.&lt;/p&gt;

&lt;p&gt;
Asking a hardware guy, I learnt that connecting a small resistance
between the SPI1_DATIN pin and the flash, the problem can be solved.
Without communication, it will feel low, and when the communication
starts that small resistance won&amp;#39;t affect the communication.&lt;/p&gt;

&lt;p&gt;
Tomorrow I&amp;#39;ll try that and write you the result out of that.&lt;/p&gt;

&lt;p&gt;
Thanks for your helps.&lt;/p&gt;
&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Booting from external SPI Memory, LPC3250</title><link>https://community.arm.com/thread/142684?ContentTypeID=1</link><pubDate>Thu, 12 Aug 2010 07:35:20 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:9e3dade6-3bb3-450c-9c62-36c09444e14e</guid><dc:creator>Non Keil Related</dc:creator><description>&lt;p&gt;&lt;p&gt;
As I stated at the start:&lt;/p&gt;

&lt;p&gt;
&lt;i&gt;Refer to the NXP LPC32x0 user manual.&lt;/i&gt;&lt;/p&gt;

&lt;p&gt;
&lt;i&gt;It has a whole chapter (#35) describing the boot
process.&lt;br /&gt;&lt;/i&gt;&lt;br /&gt;
There is nothing there that describes any part of the inbuilt
bootstrap code that is specific to the Phytec board.&lt;/p&gt;
&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Booting from external SPI Memory, LPC3250</title><link>https://community.arm.com/thread/139654?ContentTypeID=1</link><pubDate>Thu, 12 Aug 2010 05:40:02 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:7ee14270-a1b8-41de-abd4-b6c7d74b8131</guid><dc:creator>edPer Westermark</dc:creator><description>&lt;p&gt;&lt;p&gt;
Don&amp;#39;t you think that it is a question to the company who wrote the
boot loader? If they have specified a specific behaviour for a
specific signal, they must also have some view on how to get that
signal to that pin.&lt;/p&gt;

&lt;p&gt;
For example - if the pin should be low forever, or if the board
should have logic that holds the pin low for x microseconds after
reset, or if they just expect the memory chip to hold the signal low
until they sends the first command to the memory chip.&lt;/p&gt;

&lt;p&gt;
It is not a Keil problem, but if you do get an answer it may be a
number of readers on this forum who would be interested in the
answer.&lt;/p&gt;
&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Booting from external SPI Memory, LPC3250</title><link>https://community.arm.com/thread/136220?ContentTypeID=1</link><pubDate>Thu, 12 Aug 2010 05:00:08 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:0dd8878a-6779-432c-8ae7-25d220ac9aef</guid><dc:creator>Aykut Birsen</dc:creator><description>&lt;p&gt;&lt;p&gt;
That was not the main question of my text.&lt;br /&gt;
The question is, should there be a jumper?&lt;/p&gt;

&lt;p&gt;
The SPI1_DATIN pin, which is the input pin for the SSP/SPI
communication, is already connected to the SPI Flash (to the output
pin of the flash). If I keep the pin low, how can the processor read
the data out of the flash?&lt;/p&gt;

&lt;p&gt;
Therefore, maybe the jumper is not the way to clear that bit.&lt;/p&gt;

&lt;p&gt;
I hope I could tell my problem.&lt;/p&gt;

&lt;p&gt;
Thank you.&lt;/p&gt;
&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Booting from external SPI Memory, LPC3250</title><link>https://community.arm.com/thread/126322?ContentTypeID=1</link><pubDate>Thu, 12 Aug 2010 04:15:50 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:794cba5f-42b5-47e4-9766-bd5bd1cea20a</guid><dc:creator>Andy Neil</dc:creator><description>&lt;p&gt;&lt;p&gt;
That really is a question for &lt;b&gt;the board manufacturer&lt;/b&gt; - it
has nothing to do with Keil!&lt;/p&gt;

&lt;p&gt;
&lt;i&gt;&amp;quot;how can I find the jumper?&amp;quot;&lt;/i&gt;&lt;/p&gt;

&lt;p&gt;
Ask &lt;b&gt;Phytec&lt;/b&gt; - it&amp;#39;s their board!&lt;/p&gt;
&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Booting from external SPI Memory, LPC3250</title><link>https://community.arm.com/thread/115940?ContentTypeID=1</link><pubDate>Thu, 12 Aug 2010 03:55:38 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:9f672231-5150-42c5-8fea-73884a62067c</guid><dc:creator>Aykut Birsen</dc:creator><description>&lt;p&gt;&lt;p&gt;
Hi,&lt;/p&gt;

&lt;p&gt;
I found something in the user manual.&lt;/p&gt;

&lt;p&gt;
It says that the SPI1_DATIN pin should be cleared in order to tell
the processor that an external SPI Flash (having 3 address bytes) is
being used rather than the predefined one (having 2 address
bytes).&lt;br /&gt;
It makes sense because the same code on the SPI EEPROM on Phytec
board boots but an external one does not. Apparently the SPI1_DATIN
pin is made HIGH!!!&lt;/p&gt;

&lt;p&gt;
So, how am I going to clear this pin? It is already connected to
the SPI Flash. Shouldn&amp;#39;t there be a jumper for this on the board? If
so, how can I find the jumper?&lt;/p&gt;

&lt;p&gt;
Thanks for your helps.&lt;/p&gt;
&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Booting from external SPI Memory, LPC3250</title><link>https://community.arm.com/thread/136232?ContentTypeID=1</link><pubDate>Tue, 10 Aug 2010 04:18:42 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:1c695b43-c7f4-4f6b-9ecb-15f99a4ce19d</guid><dc:creator>Aykut Birsen</dc:creator><description>&lt;p&gt;&lt;p&gt;
The Flash I am using now is AT45DB321D.&lt;/p&gt;

&lt;p&gt;
The Flash on the Phytec board is AT25256A.&lt;/p&gt;

&lt;p&gt;
NXP says, boot happens when the read opcode is &amp;quot;0x03&amp;quot; and there
are 2 or 3 address bytes. My new flash can also be read with &amp;quot;0x03&amp;quot;
and has 3 address bytes.&lt;/p&gt;

&lt;p&gt;
I don&amp;#39;t figure out the problem.&lt;/p&gt;

&lt;p&gt;
Thanks.&lt;/p&gt;
&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Booting from external SPI Memory, LPC3250</title><link>https://community.arm.com/thread/104150?ContentTypeID=1</link><pubDate>Tue, 10 Aug 2010 01:02:34 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:f78a7aaa-c9e8-4721-9990-f1482cf6a17f</guid><dc:creator>Andy Neil</dc:creator><description>&lt;p&gt;&lt;p&gt;
I presume you mean, &amp;quot;read&amp;quot; ?&lt;/p&gt;

&lt;p&gt;
If your read routines contain a bug that&amp;#39;s complimentary to your
write routines, that could make it appear to read correctly - but be
wrong for execution.&lt;/p&gt;

&lt;p&gt;
eg, byte ordering...?&lt;/p&gt;
&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Booting from external SPI Memory, LPC3250</title><link>https://community.arm.com/thread/126319?ContentTypeID=1</link><pubDate>Tue, 10 Aug 2010 00:59:48 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:2eb70a47-a1b8-47fd-bd28-76bdfe80d380</guid><dc:creator>Andy Neil</dc:creator><description>&lt;p&gt;&lt;p&gt;
That isn&amp;#39;t &lt;i&gt;necessarily&lt;/i&gt; true - there could be some latent
bug(s) that you just happened to get away with before...&lt;/p&gt;
&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Booting from external SPI Memory, LPC3250</title><link>https://community.arm.com/thread/126323?ContentTypeID=1</link><pubDate>Tue, 10 Aug 2010 00:33:12 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:e094af6d-587f-43b1-82ba-3b63a9963ea3</guid><dc:creator>Non Keil Related</dc:creator><description>&lt;p&gt;&lt;p&gt;
The details you&amp;#39;ve provided are pretty scant. You didn&amp;#39;t mention
what SPI flash your using and whether it is the same as the one on
the Phytec board.&lt;/p&gt;

&lt;p&gt;
The obvious thing to do is look for the differences that might
exist.&lt;/p&gt;
&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Booting from external SPI Memory, LPC3250</title><link>https://community.arm.com/thread/115939?ContentTypeID=1</link><pubDate>Tue, 10 Aug 2010 00:08:08 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:036cfa7d-20ce-40d6-9831-472ddbda69fe</guid><dc:creator>Aykut Birsen</dc:creator><description>&lt;p&gt;&lt;p&gt;
But,&lt;/p&gt;

&lt;p&gt;
The same code that I had written to the flash on the Phytec Board
boots. So, I understand that the code is valid, bug-free.&lt;/p&gt;

&lt;p&gt;
What else can be the problem?&lt;/p&gt;

&lt;p&gt;
Thanks.&lt;/p&gt;
&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Booting from external SPI Memory, LPC3250</title><link>https://community.arm.com/thread/104149?ContentTypeID=1</link><pubDate>Mon, 09 Aug 2010 23:56:03 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:7943ab6a-9e53-4135-a992-545e5b720d70</guid><dc:creator>Andy Neil</dc:creator><description>&lt;p&gt;&lt;p&gt;
The fact that the bytes were correctly written into the flash does
not guarantee that those bytes represent a valid, bug-free
program!&lt;/p&gt;
&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Booting from external SPI Memory, LPC3250</title><link>https://community.arm.com/thread/78534?ContentTypeID=1</link><pubDate>Mon, 09 Aug 2010 23:13:42 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:7e2941b2-4d20-48b1-9c0c-59c81c35b82c</guid><dc:creator>Aykut Birsen</dc:creator><description>&lt;p&gt;&lt;p&gt;
Yes, I carefully read the chapter. It says no dependence on any
chip.&lt;/p&gt;

&lt;p&gt;
However, I wrote my code to the flash correctly, but it doesn&amp;#39;t
boot.&lt;/p&gt;

&lt;p&gt;
Page0: First 528 bytes of the code&lt;br /&gt;
Page1: Next 500 byte of the code.&lt;br /&gt;
Page2:&lt;br /&gt;
- :&lt;br /&gt;
- :&lt;br /&gt;
- :&lt;br /&gt;
Pagen:&lt;/p&gt;

&lt;p&gt;
I correctly write the boot data format and the data length.
Because I can rad them.&lt;/p&gt;

&lt;p&gt;
So why doesn&amp;#39;t it boot? Can anyone please propose something?&lt;/p&gt;
&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Booting from external SPI Memory, LPC3250</title><link>https://community.arm.com/thread/58518?ContentTypeID=1</link><pubDate>Mon, 09 Aug 2010 02:24:53 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:07d992f7-3ebe-491f-9239-4a4ebcee11e0</guid><dc:creator>Non Keil Related</dc:creator><description>&lt;p&gt;&lt;p&gt;
Refer to the NXP LPC32x0 user manual.&lt;/p&gt;

&lt;p&gt;
It has a whole chapter (#35) describing the boot process.&lt;/p&gt;

&lt;p&gt;
There is nothing in the on-chip bootstrap code specific to (or
that relies upon) the Phytec board.&lt;/p&gt;
&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>