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<?xml-stylesheet type="text/xsl" href="https://community.arm.com/utility/feedstylesheets/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/"><channel><title>external dual flash memory AT49xV32x</title><link>https://community.arm.com/developer/tools-software/tools/f/keil-forum/38768/external-dual-flash-memory-at49xv32x</link><description> 
I have 2 off Atmel AT49BV322D devices in my design to provide a 32
bit wide memory. I am using the flash Memory Download Setup option
AT49xV32x Dual Flash with address range set to 80000000H - 807FFFFFH.
The device size is reported to be 8M (although</description><dc:language>en-US</dc:language><generator>Telligent Community 10</generator><item><title>RE: external dual flash memory AT49xV32x</title><link>https://community.arm.com/thread/126064?ContentTypeID=1</link><pubDate>Wed, 31 Mar 2010 02:53:20 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:3ad71356-4c19-47d9-ab2d-3d83fc88b258</guid><dc:creator>Robert &amp;#160;</dc:creator><description>&lt;p&gt;&lt;p&gt;
I&amp;#39;m happy that it works now.&lt;/p&gt;

&lt;p&gt;
However there are still some points which are not clear:&lt;/p&gt;

&lt;p&gt;
Keil algorithm uses Toggle on I/O6 which is always available
regardless of Configuration Mode (Mode 00 or 01). The algorithm
doesn&amp;#39;t touch the Configuration register (the default value after
reset is 00). Therefore changing Configuration Mode to 01 should not
be necessary.&lt;/p&gt;

&lt;p&gt;
Also I see that in the latest Flash.ini you have changed the
configuration of BCFG0 (Bus Configuration for Bank 0). Now RBLE bit
is 0 (before it was 1). So maybe this was the actual problem. I would
need to see the schematics of the CPU &amp;lt;&amp;gt; Flash connection to be
able to judge this.&lt;/p&gt;

&lt;p&gt;
Anyway you can ignore the above remarks if you are happy that it
works or you can look further into this to clarify the remaining
questions.&lt;/p&gt;
&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: external dual flash memory AT49xV32x</title><link>https://community.arm.com/thread/115650?ContentTypeID=1</link><pubDate>Wed, 31 Mar 2010 02:08:28 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:8252d4d8-3292-4e39-97ea-8a61d0f5bb49</guid><dc:creator>john white</dc:creator><description>&lt;p&gt;&lt;p&gt;
After further reading of the Atmel data sheet I now realise that
the Keil algorithm was using the Toggle mode for polling (which uses
status bit 6 to check for completion status). The use of the Toggle
mode requires that the Set Configuration Register is set to mode
01.&lt;br /&gt;
I have now set the status bit checking to use bit 6 as originally
supplied in the Keil algorithm. I apologise for thinking that there
was bugs in the supplied code, and I now realise that the reason that
my mods apparently partially worked was that my memory was trying to
operate in the Mode 00, which used bit 7 for status polling.&lt;/p&gt;

&lt;p&gt;
I have now been able to reliably program my flash memory after
making 2 mods to my programs. It appeared that my memory was&amp;#39;nt
getting set to the Toggle mode after power up (the Atmel data sheet
says that the default mode is 00 upon power up or reset). I believe
that the Keil flash program is trying to set this mode to 01, but
maybe I have a timing issue that prevents the memory from being
loaded with this value.I have therefore added the following
initialisation code as part of the Init(..) function in the
FlashPrg.c algorithm&lt;/p&gt;

&lt;p&gt;
int Init (unsigned long adr, unsigned long clk, unsigned long fnc)
{&lt;br /&gt;
base_adr = adr;&lt;br /&gt;
// set Configuration register to 01 i.e TOGGLE mode&lt;br /&gt;
M32(base_adr + (0x0AAA &amp;lt;&amp;lt; 1)) = 0x00AA00AA;&lt;br /&gt;
M32(base_adr + (0x1554 &amp;lt;&amp;lt; 1)) = 0x00550055;&lt;br /&gt;
M32(base_adr + (0x0AAA &amp;lt;&amp;lt; 1)) = 0x00D000D0;&lt;br /&gt;
M32(base_adr + (0x0AAA &amp;lt;&amp;lt; 1)) = 0x00010001;&lt;br /&gt;
return (0);&lt;br /&gt;
}&lt;/p&gt;

&lt;p&gt;
The values assigned in my Flash.ini file are now:&lt;/p&gt;

&lt;p&gt;
_WDWORD(0xFFE00000, 0x20001062);&lt;br /&gt;
_WDWORD(0xE002C014, 0x0F814924);&lt;/p&gt;

&lt;p&gt;
All is now working fine...thank goodness:-)&lt;/p&gt;

&lt;p&gt;
Fortunately the H/W connections were all OK. My usual fault
finding always checks these signals before checking my code...I&amp;#39;v
learrnt from experience to always check my hardware connections
first...lol&lt;/p&gt;

&lt;p&gt;
Thank you for your advice and help.&lt;/p&gt;
&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: external dual flash memory AT49xV32x</title><link>https://community.arm.com/thread/103864?ContentTypeID=1</link><pubDate>Tue, 30 Mar 2010 22:55:04 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:16ef8148-f152-44f2-82b7-fedb54ae7004</guid><dc:creator>Robert &amp;#160;</dc:creator><description>&lt;p&gt;&lt;p&gt;
AT49xV32x Dual Flash algorithm has been successfully used on
different targets (example: Phytec phyCORE SBC with LPC2294).&lt;/p&gt;

&lt;p&gt;
&lt;i&gt;&amp;lt;the polling checks are made to the status bit 6, whereas
the Atmel data sheet refers to bit 7 to poll for
completion&amp;gt;&lt;/i&gt;&lt;/p&gt;

&lt;p&gt;
The mentioned algorithm uses Toggle Bit algorithm for completion
and the Atmel User Manual clearly states that I/O6 (bit 6) is used
for this.&lt;/p&gt;

&lt;p&gt;
Let&amp;#39;s first assume that the original unmodified algorithm works
and check the HW and the initialization script.&lt;/p&gt;

&lt;p&gt;
Has the HW already been verified (all connection correct in
schematics and actual PCB)? Is the address/data bus correctly
connected? How are nOE, nWE connected? Is the Flash nBYTE pin
connected to logic high?&lt;/p&gt;
&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: external dual flash memory AT49xV32x</title><link>https://community.arm.com/thread/78205?ContentTypeID=1</link><pubDate>Tue, 30 Mar 2010 07:05:19 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:8636ea55-7d52-4cbd-b138-dd254c5176d8</guid><dc:creator>john white</dc:creator><description>&lt;p&gt;&lt;p&gt;
Robert,&lt;br /&gt;
I forgot to say that upon completion of the download then after the
verify phase completes I get the following message for all locations
where bit 2 of the address=1 (which corresponds to the real A0 signal
due to the 4 bytes written per memory word)&lt;br /&gt;
Contents missmatch at: 80000004H (flash=FFH Required=33H) !&lt;br /&gt;
this is the same format message for all the other locations with bit
2 set.&lt;/p&gt;

&lt;p&gt;
locations 80000000H to 80000003H ,and alike, do not report errors
(i.e bit2 = 0)&lt;/p&gt;
&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: external dual flash memory AT49xV32x</title><link>https://community.arm.com/thread/78204?ContentTypeID=1</link><pubDate>Tue, 30 Mar 2010 06:57:32 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:4f996869-8354-44db-b384-ae824807ddc1</guid><dc:creator>john white</dc:creator><description>&lt;p&gt;&lt;p&gt;
Hi Robert, here is my Flash.ini :-&lt;br /&gt;
FUNC void Setup (void) {&lt;/p&gt;

&lt;p&gt;
_WDWORD(0xFFE00000, 0x20003CE3); // BCFG0: Flash Bus
Configuration&lt;/p&gt;

&lt;p&gt;
_WDWORD(0xE002C014, 0x0F814924); // PINSEL2: CS0, OE, WE, BLS0..3
// D0..31, A2..23, JTAG&lt;br /&gt;
} Setup(); // Setup for Flash&lt;/p&gt;

&lt;p&gt;
Another thing I have found is that within the AT49xV32x Dual Flash
C source file (as supplied by
Keil....\Keil\Arm\Flash\AT49xV32x_2\FlashDev.c) the polling checks
are made to the status bit 6, whereas the Atmel data sheet refers to
bit 7 to poll for completion of the program word. I have made my own
version of the algorithm to check bit 7, and this now completes the
erase chip and erase sectors which are performed at the start of the
Download flash.&lt;br /&gt;
I am now able to complete the Download flash, but it appears to only
be writing to addresses with A0 = 0, when A1=1 then the location is
not programmed.&lt;br /&gt;
As you can see I am getting there slowly. But I have only been able
to get this far by creating my own version of the supplied algorithm
(checking status bit 7). This is what made me suspicious that the
supplied algorithm had bugs in it.&lt;/p&gt;

&lt;p&gt;
Have you been able to succesfully use the Keil supplied
algorithm?&lt;/p&gt;

&lt;p&gt;
regards John&lt;/p&gt;
&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: external dual flash memory AT49xV32x</title><link>https://community.arm.com/thread/57984?ContentTypeID=1</link><pubDate>Tue, 30 Mar 2010 05:35:54 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:9ae3d6c0-dc05-4ba7-8429-763be5625607</guid><dc:creator>Robert &amp;#160;</dc:creator><description>&lt;p&gt;&lt;p&gt;
AT49xV32x Dual Flash algorithm is the correct one and only one is
required.&lt;/p&gt;

&lt;p&gt;
AT49xV32x size is 2M*16 or 4M*8. When two are used to provide
32-bit wide memory the total size is 8MB.&lt;/p&gt;

&lt;p&gt;
A proper flash.ini is required which will configure the external
memory controller. Can you show the script file you are using?&lt;/p&gt;
&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>