USB Flow Control

Using the USB sample code of the RL-ARM library on MCB2300 develoment board. Started with the mass storage device example and modified for our application.

Is this example valid to USB specification? In particular concerned about flow control. I'm not clear if flow control in hw or sw or both. If not hardware, do these examples implement proper flow control? Our application may get some data and send time processing before reading more data.

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  • "I'm not clear if flow control in hw or sw or both."

    USB spec defines the intrinsic flow control using NAK,
    which is automatically handled by USB engine on MCU and host controller on PC.
    Of course, the USB engines on the NXP LPC family are equipped this hardware flow control.

    The NAK flow control works as follows.

    If an IN endpoint (EP) on a MCU is empty when a host accesses to it, the EP returns NAK. The host retries the IN transaction while the EP returns NAK, without any error.
    When the firmware loads a packet to the EP, the packet is retrieved by the host on the next IN transaction.

    If an OUT EP is occupied by the last packet when a host sends next packet, the EP returns NAK. The host retries the OUT transaction of the same packet content while the EP returns NAK, without any error.
    When the firmware unloads the last packet from the EP, the EP becomes empty, and the next packet is accepted by the EP.

    This NAK flow control is applied to bulk and interrupt EPs. Also, you'll see it on the data and status stage of control transfer on the default EP.

    NAKing is not any error. Then, unless host app or device driver cancel the transfer (usually by timeout), it continues forever.

    The bulk endpoints of LPC2368/78 has double buffer. The OUT and IN EPs can hold two packets. Naking starts when both of buffer are full (OUT), or both are empty (IN).

    Tsuneo

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  • "I'm not clear if flow control in hw or sw or both."

    USB spec defines the intrinsic flow control using NAK,
    which is automatically handled by USB engine on MCU and host controller on PC.
    Of course, the USB engines on the NXP LPC family are equipped this hardware flow control.

    The NAK flow control works as follows.

    If an IN endpoint (EP) on a MCU is empty when a host accesses to it, the EP returns NAK. The host retries the IN transaction while the EP returns NAK, without any error.
    When the firmware loads a packet to the EP, the packet is retrieved by the host on the next IN transaction.

    If an OUT EP is occupied by the last packet when a host sends next packet, the EP returns NAK. The host retries the OUT transaction of the same packet content while the EP returns NAK, without any error.
    When the firmware unloads the last packet from the EP, the EP becomes empty, and the next packet is accepted by the EP.

    This NAK flow control is applied to bulk and interrupt EPs. Also, you'll see it on the data and status stage of control transfer on the default EP.

    NAKing is not any error. Then, unless host app or device driver cancel the transfer (usually by timeout), it continues forever.

    The bulk endpoints of LPC2368/78 has double buffer. The OUT and IN EPs can hold two packets. Naking starts when both of buffer are full (OUT), or both are empty (IN).

    Tsuneo

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