<?xml version="1.0" encoding="UTF-8" ?>
<?xml-stylesheet type="text/xsl" href="https://community.arm.com/utility/feedstylesheets/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/"><channel><title>Multiprocessor comms</title><link>https://community.arm.com/developer/tools-software/tools/f/keil-forum/36818/multiprocessor-comms</link><description> Hi, I am working on a project for a piece of laboratory equipment where we will have one main processor sequencing events and communicating with a PC vis RS232 and 4 sub-processors controlling temperatures, motor speeds, looading system and the like</description><dc:language>en-US</dc:language><generator>Telligent Community 10</generator><item><title>RE: Multiprocessor comms</title><link>https://community.arm.com/thread/123029?ContentTypeID=1</link><pubDate>Tue, 25 Oct 2005 10:34:03 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:55ac82f4-e417-4631-937d-f94026c634a6</guid><dc:creator>John Hutchinson</dc:creator><description>&lt;p&gt;&lt;i&gt;anyhow, if you are starved for time, write it in assy. Shifting the status value right 2 gives a nice jump table.&lt;/i&gt;&lt;br /&gt;
I know, I guess thats why Philipps designed the status register so that the status codes are multiples of 8 so that you could have a jump table or just code in the 8 byte gaps.  As far as writing it in assy, the I2C messages I&amp;#39;m sending/receiving are stored in structs with pointers to them, I&amp;#39;d rather not do that in assy, its why I have a C compiler ;-)  I&amp;#39;m just curious as to why the switch...case construct seems to be much slower that a bunch of IF&amp;#39;s.  I would have assumed that they lead to more or less the same object code, but evidently not.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Multiprocessor comms</title><link>https://community.arm.com/thread/111755?ContentTypeID=1</link><pubDate>Tue, 25 Oct 2005 09:56:38 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:097523a1-f09c-4019-ae2f-9de22aad0cce</guid><dc:creator>erik  malund</dc:creator><description>&lt;p&gt;anyhow, if you are starved for time, write it in assy.  Shifting the status value right 2 gives a nice jump table.&lt;br /&gt;
&lt;br /&gt;
Erik&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Multiprocessor comms</title><link>https://community.arm.com/thread/97601?ContentTypeID=1</link><pubDate>Tue, 25 Oct 2005 09:55:28 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:dd1fdbf4-0350-43eb-9c33-7bc3b1f47140</guid><dc:creator>erik  malund</dc:creator><description>&lt;p&gt;&lt;i&gt;Thanks Erik, but I think the code from CodeArchitect will have the same problem. In fact I have fixed the speed issue by using lots of IF&amp;#39;s instead of the switch, I don&amp;#39;t know that should be faster but it is. The switch statement I was using had 9 cases and if the correct one was the last one it would take about 100us to get to it. Looking at the assembly there is an LCALL to a library routine to select between the cases and that seems to be what is taking all the time.&lt;/i&gt;&lt;br /&gt;
yes, switch is slow; however there are means.  I think to recall, but do not recall when or where, and have not been succseful since (&lt;b&gt;Jon/Reinhard please chime in&lt;/b&gt;) I succeeded making a C switch where with the cases being 0-2-4... (which can be accomplished in the HW IIC by a shift) it actually generated a jmp @a+dptr&lt;br /&gt;
&lt;br /&gt;
Erik&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Multiprocessor comms</title><link>https://community.arm.com/thread/73583?ContentTypeID=1</link><pubDate>Tue, 25 Oct 2005 09:37:33 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:5ae6b046-ca54-44a2-9735-e27ef2c946da</guid><dc:creator>John Hutchinson</dc:creator><description>&lt;p&gt;Thanks Erik, but I think the code from CodeArchitect will have the same problem.  In fact I have fixed the speed issue by using lots of IF&amp;#39;s instead of the switch, I don&amp;#39;t know that should be faster but it is.  The switch statement I was using had 9 cases and if the correct one was the last one it would take about 100us to get to it.  Looking at the assembly there is an LCALL to a library routine to select between the cases and that seems to be what is taking all the time.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Multiprocessor comms</title><link>https://community.arm.com/thread/44920?ContentTypeID=1</link><pubDate>Mon, 24 Oct 2005 08:51:29 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:89bf089e-04a3-4461-a47b-175cb19dbfb8</guid><dc:creator>erik  malund</dc:creator><description>&lt;p&gt;I&amp;#39;m using IIC between master and slaves (albeit, this time, not with a 668) and use the code generated by the CodeArchitect for LPC932 (free &lt;a href="http://www.esacademy.com" target="_blank"&gt;http://www.esacademy.com&lt;/a&gt;) all that I needed was to change a few SFR names and the whole clocking setup.  One of the 3 processors is a LPC the other 2 ruj the same code adapted.&lt;br /&gt;
&lt;br /&gt;
Erik&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>