I am converting a board from an 80C32 to a P89C51RC2Hxx. This board has SRAM mapped at 0x8000 - 0xFFFF and I/O mapped at various places from 0x0000 - 0x0700 and declared as XDATA. The decode for the I/O was done with a PAL and used PSEN and a few address lines to differentiate between the SRAM (XDATA) and the I/O. The problem is that my I/O will not work with this uP but my SRAM is fine. When I look at it with a logic analyzer SRAM select is firing every time I try to write to the I/O. I have tried every type of mapping combination but it doesn't change. It works fine with my emulator but no when on the chip. Any ideas would be greatly appreciated. Steve
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