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<?xml-stylesheet type="text/xsl" href="https://community.arm.com/utility/feedstylesheets/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/"><channel><title>How does uVision start executing M3 flash OS from RAM?</title><link>https://community.arm.com/developer/tools-software/tools/f/keil-forum/29910/how-does-uvision-start-executing-m3-flash-os-from-ram</link><description> 
It seems the flash programming algorithm is a piece of code that
is downloaded into the SRAM and executes from there. 

 
But how does it get started if there is nothing yet in the vector
table at 0? If the flash is erased then everything in the vector</description><dc:language>en-US</dc:language><generator>Telligent Community 10</generator><item><title>RE: How does uVision start executing M3 flash OS from RAM?</title><link>https://community.arm.com/thread/140566?ContentTypeID=1</link><pubDate>Wed, 24 Apr 2013 08:50:39 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:61a1e499-c84e-4971-a497-4593978b1d82</guid><dc:creator>Matthew Bates</dc:creator><description>&lt;p&gt;&lt;p&gt;
It&amp;#39;s an M3 embedded in a much larger ASIC, not a stand-alone MCU
chip&lt;/p&gt;
&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: How does uVision start executing M3 flash OS from RAM?</title><link>https://community.arm.com/thread/137001?ContentTypeID=1</link><pubDate>Tue, 23 Apr 2013 20:01:17 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:5e47e323-c430-4cec-a375-8e4d2e37ed0c</guid><dc:creator>John Linq</dc:creator><description>&lt;p&gt;&lt;p&gt;
&lt;i&gt;-&amp;gt; Mine doesn&amp;#39;t have that BOOT0/1 feature &amp;lt;-&lt;/i&gt;&lt;/p&gt;

&lt;p&gt;
What M3 MCU do you use?&lt;/p&gt;
&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: How does uVision start executing M3 flash OS from RAM?</title><link>https://community.arm.com/thread/128138?ContentTypeID=1</link><pubDate>Tue, 23 Apr 2013 09:05:43 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:509f1917-ab44-4f08-8ab3-449a1ce1d49f</guid><dc:creator>Westonsupermare Pier</dc:creator><description>&lt;p&gt;&lt;p&gt;
Starting a device via JTAG is a messy process. If the processor is
starting from a blank flash it&amp;#39;s going to fault very quickly. Code
can be injected into RAM, PC/SP set up, breakpoints/watchpoints set,
it doesn&amp;#39;t need to be reset again. JTAG can modify the internal state
of the processor.&lt;/p&gt;

&lt;p&gt;
Most devices have an Internal ROM which can be mapped at zero.&lt;/p&gt;
&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: How does uVision start executing M3 flash OS from RAM?</title><link>https://community.arm.com/thread/120046?ContentTypeID=1</link><pubDate>Tue, 23 Apr 2013 08:46:12 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:1f7d803e-6c22-44f3-ad36-8b8e34937465</guid><dc:creator>Matthew Bates</dc:creator><description>&lt;p&gt;&lt;p&gt;
Mine doesn&amp;#39;t have that BOOT0/1 feature&lt;/p&gt;

&lt;p&gt;
But going back to the original question. None of these answers
explain how a vanilla M3 microcontroller is first flashed. Initially
the flash is all F&amp;#39;s. To attach JTAG and fiddle with the PC to make
it point to the flash programming algorithm downloaded in SRAM you
have to first take it out of reset. But by then it has already
started executing the erased flash, so it fetches a stack pointer of
FFFFFFFF and a reset vector of FFFFFFFF both of which will probably
make it go off in the weeds. Now maybe the debugger can use JTAG to
recover from the fault but this seems a very messy way of doing the
most fundamental thing to start using a flash-based M3.&lt;/p&gt;
&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: How does uVision start executing M3 flash OS from RAM?</title><link>https://community.arm.com/thread/118404?ContentTypeID=1</link><pubDate>Tue, 23 Apr 2013 08:30:55 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:63b025ad-b584-46eb-9e58-c8a0be4048f0</guid><dc:creator>Westonsupermare Pier</dc:creator><description>&lt;p&gt;&lt;p&gt;
With STM32 parts you have to drive the BOOT0/1 pins to map the
boot memory to zero when you reset, other M3 cores presumably have
similar mechanics.&lt;/p&gt;

&lt;p&gt;
Unless there is a compelling reason to enter via reset, a loader
can simply pass control to RAM based code by jumping to it.&lt;/p&gt;
&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: How does uVision start executing M3 flash OS from RAM?</title><link>https://community.arm.com/thread/107047?ContentTypeID=1</link><pubDate>Tue, 23 Apr 2013 06:40:59 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:64d85e50-6773-4715-8800-9a888a337aab</guid><dc:creator>ImPer Westermark</dc:creator><description>&lt;p&gt;&lt;p&gt;
You can&amp;#39;t reset your processor when debugging in RAM. Or more
specifically: You can&amp;#39;t reset it and expect it to be able to start
your program a second time.&lt;/p&gt;

&lt;p&gt;
You can have the debugger set the PC to the correct start address.
And you can then have your own startup code configure the VTOR (I
assume it stands for something like Vector Table Offset Register for
your specific processor) to tell the core exactly where the interrupt
vector table is.&lt;/p&gt;

&lt;p&gt;
So as long as both code + data fits in your RAM, you can debug in
RAM. But the debugger must be involved to fix an initial PC value if
you try to reset the processor.&lt;/p&gt;

&lt;p&gt;
Note that not all processors allows execution from all RAM memory
ranges. Some RAM may be located on a separate memory bus intended for
DMA transfers to/from peripherial hardware. The processor pipeline
and any code cache needs integration with used RAM regions to make
sure everything works as intended.&lt;/p&gt;
&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: How does uVision start executing M3 flash OS from RAM?</title><link>https://community.arm.com/thread/81179?ContentTypeID=1</link><pubDate>Tue, 23 Apr 2013 06:24:49 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:bc42af29-52d1-4166-b792-745fccc54ae1</guid><dc:creator>Matthew Bates</dc:creator><description>&lt;p&gt;&lt;p&gt;
That sounds reasonable but I can&amp;#39;t get it to work.&lt;/p&gt;

&lt;p&gt;
I have tried compiling the code so the IRAM and IROM are in the
system RAM space (starting at 0x20000000) and I see that the image is
built correctly with the vector table at 0x20000000 and loaded
correctly by uVision (this is in simulation mode).&lt;/p&gt;

&lt;p&gt;
But I can&amp;#39;t get the G command to work (I tried G 0x20000100, the
reset vector), it seems determined to load the vector table from 0
and the G command causes a fault *** error 65: access violation at
0xFFFFFFF4 : no &amp;#39;write&amp;#39; permission&lt;/p&gt;

&lt;p&gt;
I tried setting the VTOR register but that seems to be useless
since any kind of reset resets the VTOR register so the vector table
offset is immediately lost.&lt;/p&gt;
&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: How does uVision start executing M3 flash OS from RAM?</title><link>https://community.arm.com/thread/68245?ContentTypeID=1</link><pubDate>Tue, 23 Apr 2013 06:03:09 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:c7a0e46d-f0e7-4db2-bd88-d086f8357783</guid><dc:creator>ImPer Westermark</dc:creator><description>&lt;p&gt;&lt;p&gt;
The JTAG interface allows the processor to be controlled. So the
JTAG interface can manually put bytes of data into RAM. And the JTAG
interface can give a suitable value to PC to make the processor run
the code that was downloaded into RAM.&lt;/p&gt;

&lt;p&gt;
So no need for any reset vector when you have a JTAG adapter
connected.&lt;/p&gt;

&lt;p&gt;
So no - you can&amp;#39;t normally boot from RAM. Just that some
processors have an internal boot loader that can (depending on
configuration) retrieve a boot image from some non-volatile
interface, like an SD card or an USB thumb drive, and copy into RAM
and then have that program continue with any further startup
actions.&lt;/p&gt;

&lt;p&gt;
When debugging using the Keil tools, you normally have an init
file for the debugger with a line that tells the debugger what PC
value to use after your program have been downloaded into RAM. So
same method as used when programming the chip, but instead used to
let you debug applications directly from RAM without involvement of
any boot loader.&lt;/p&gt;
&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>