I'm using the Keil MCBSTM32F400 development board and I'd like to start using the external SRAM.
From the user's guide the SRAM uses the following pins and is at the following location: SRAM FSMC_NE3 / PG10 0x68000000 - 0x681FFFFF
I'm having trouble accessing the memory. When trying to write, nothing happens and when reading back I always get 0xFF.
Does anyone have an example of setting up the FSMC for the Keil development board to use its external SRAM?
Is there a Keil example application that shows how to use the memory?
What I've tried so far:
In the standard system_stm32f4xx.c file, I enabled the external memory by defining DATA_IN_ExtSRAM (uncommenting).
In the SystemInit_ExtMemCtl() function I commented out three lines where they were directly configuring the FSMC_Bank1 timing and control registers; uncommented the FSMC_NORSRAMInitStructure; changed FSMC_Bank1_NORSRAM2 to FSMC_Bank1_NORSRAM3; called teh FSMC_NORSRAMInit() function with the structure; and finally added a call to FSMC_NORSRAMCmd() to enable.
I did not change any of the GPIO alternate function setup from what is in the standard system file.
I have not looked into the timing settings for the SRAM on the Keil board vs. the timing for the G_EVAL board external SRAM to see if they're different enough to change.
Any help would be greatly appreciated.
I was working at at byte level and just hacking together something, so I used the code snippet below to write three values.
uint8_t * p_block_addr;
p_block_addr = (uint8_t *)0x68000000;
*p_block_addr = 0x00; *(p_block_addr + 1) = 0x01; *(p_block_addr + 2) = 0x02;
Do you create the pointer to the address like this: ?
#define Bank1_SRAM2_ADDR ((uint32_t)0x68000000)
Hello all! Today I understood the whole day with the code proposed by John. But, unfortunately, was not able to make it work - even my project did not start! I'm also in the in "options for target", said the value of the start address 0x68000000 and size 0x200000 (not 0x20000!) - This corresponds 2MB. And, of course, uncomment # define DATA_IN_ExtSRAM in the file. But it did not help. All I was able to achieve - is an inscription in Keil: "Cannot access Memory" in Debug mode.
I'm only using the external ram as a large buffer so I'm just assigning a pointer to address 0x68000000 then using it to store some data. I'm not trying to relocate code or data segments there.
I did not modify the options for target although I've seen that done using the .sct file.
If this is the Keil board, the external ram address is 0x68000000 not 0x60000000.
In your system_stm32f4xx.c you have to uncomment #define DATA_IN_ExtSRAM.
Hope that helps.
John.
Hello John, Nice to meet you.
I've got the same problem as you.
I pasted your code but unfortunately it didn't work.
did you do another thing apart of re-work the code?
for exemple: in "options for target" I put in the off-chip memory Areas the address of the external SRAM memory. in the datasheet says that starts in 0x60000000 so I put this value and in size I put 0x20000(1MB)
Here's what worked for me. As suspected the gpios had to be tweaked.
#ifdef DATA_IN_ExtSRAM /** * @brief Setup the external memory controller. * Called in startup_stm32f4xx.s before jump to main. * This function configures the external SRAM mounted on STM324xG_EVAL board * This SRAM will be used as program data memory (including heap and stack). * @param None * @retval None */ void SystemInit_ExtMemCtl(void) { /*-- GPIOs Configuration -----------------------------------------------------*/ /* +-------------------+--------------------+------------------+------------------+ + SRAM pins assignment + +-------------------+--------------------+------------------+------------------+ | PD0 <-> FSMC_D2 | PE0 <-> FSMC_NBL0 | PF0 <-> FSMC_A0 | PG0 <-> FSMC_A10 | | PD1 <-> FSMC_D3 | PE1 <-> FSMC_NBL1 | PF1 <-> FSMC_A1 | PG1 <-> FSMC_A11 | | PD4 <-> FSMC_NOE | PE3 <-> FSMC_A19 | PF2 <-> FSMC_A2 | PG2 <-> FSMC_A12 | | PD5 <-> FSMC_NWE | PE4 <-> FSMC_A20 | PF3 <-> FSMC_A3 | PG3 <-> FSMC_A13 | | PD8 <-> FSMC_D13 | PE7 <-> FSMC_D4 | PF4 <-> FSMC_A4 | PG4 <-> FSMC_A14 | | PD9 <-> FSMC_D14 | PE8 <-> FSMC_D5 | PF5 <-> FSMC_A5 | PG5 <-> FSMC_A15 | | PD10 <-> FSMC_D15 | PE9 <-> FSMC_D6 | PF12 <-> FSMC_A6 | PG9 <-> FSMC_NE2 OLD EXAMPLE| | PD11 <-> FSMC_A16 | PE10 <-> FSMC_D7 | PF13 <-> FSMC_A7 |-PG10 <-> FSMC_NE3 For Keil board+ | PD12 <-> FSMC_A17 | PE11 <-> FSMC_D8 | PF14 <-> FSMC_A8 | | PD13 <-> FSMC_A18 | PE12 <-> FSMC_D9 | PF15 <-> FSMC_A9 | | PD14 <-> FSMC_D0 | PE13 <-> FSMC_D10 |------------------+ | PD15 <-> FSMC_D1 | PE14 <-> FSMC_D11 | | | PE15 <-> FSMC_D12 | +-------------------+--------------------+ */
FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure; FSMC_NORSRAMTimingInitTypeDef p;
FSMC_NORSRAMTimingInitTypeDef xxx;
FSMC_NORSRAMTimingInitTypeDef yyy;
FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &xxx; FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &yyy;
FSMC_NORSRAMStructInit( &FSMC_NORSRAMInitStructure );
/* Enable GPIOD, GPIOE, GPIOF and GPIOG interface clock */ RCC->AHB1ENR = 0x00000078;
/* Connect PDx pins to FSMC Alternate function */ GPIOD->AFR[0] = 0x00cc00cc; GPIOD->AFR[1] = 0xcc0ccccc; /* Configure PDx pins in Alternate function mode */ GPIOD->MODER = 0xaaaa0a0a; /* Configure PDx pins speed to 100 MHz */ GPIOD->OSPEEDR = 0xffff0f0f; /* Configure PDx pins Output type to push-pull */ GPIOD->OTYPER = 0x00000000; /* No pull-up, pull-down for PDx pins */ GPIOD->PUPDR = 0x00000000;
/* Connect PEx pins to FSMC Alternate function */ GPIOE->AFR[0] = 0xc00cc0cc; GPIOE->AFR[1] = 0xcccccccc; /* Configure PEx pins in Alternate function mode */ GPIOE->MODER = 0xaaaa828a; /* Configure PEx pins speed to 100 MHz */ GPIOE->OSPEEDR = 0xffffc3cf; /* Configure PEx pins Output type to push-pull */ GPIOE->OTYPER = 0x00000000; /* No pull-up, pull-down for PEx pins */ GPIOE->PUPDR = 0x00000000;
/* Connect PFx pins to FSMC Alternate function */ GPIOF->AFR[0] = 0x00cccccc; GPIOF->AFR[1] = 0xcccc0000; /* Configure PFx pins in Alternate function mode */ GPIOF->MODER = 0xaa000aaa; /* Configure PFx pins speed to 100 MHz */ GPIOF->OSPEEDR = 0xff000fff; /* Configure PFx pins Output type to push-pull */ GPIOF->OTYPER = 0x00000000; /* No pull-up, pull-down for PFx pins */ GPIOF->PUPDR = 0x00000000;
/* Connect PGx pins to FSMC Alternate function */ GPIOG->AFR[0] = 0x00cccccc; GPIOG->AFR[1] = 0x00000c00; //was 0x000000c0 /* Configure PGx pins in Alternate function mode */ GPIOG->MODER = 0x00200aaa; //was 0x00080aaa /* Configure PGx pins speed to 100 MHz */ GPIOG->OSPEEDR = 0x00300fff; //was 0x000c0fff /* Configure PGx pins Output type to push-pull */ GPIOG->OTYPER = 0x00000000; /* No pull-up, pull-down for PGx pins */ GPIOG->PUPDR = 0x00000000;
/*-- FSMC Configuration ------------------------------------------------------*/ /* Enable the FSMC interface clock */ RCC->AHB3ENR = 0x00000001;
/* Configure and enable Bank1_SRAM2 */ //original example // FSMC_Bank1->BTCR[2] = 0x00001015; // FSMC_Bank1->BTCR[3] = 0x00010603; // FSMC_Bank1E->BWTR[2] = 0x0fffffff;
/* Bank1_SRAM3 is configured as follow: */
p.FSMC_AddressSetupTime = 3; p.FSMC_AddressHoldTime = 0; p.FSMC_DataSetupTime = 6; p.FSMC_BusTurnAroundDuration = 1; p.FSMC_CLKDivision = 0; p.FSMC_DataLatency = 0; p.FSMC_AccessMode = FSMC_AccessMode_A;
//FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM2; FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM3; //For Keil FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable; //FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_PSRAM; FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM; //For Keil
FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b; FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable; FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable; FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low; FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable; FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState; FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable; FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable; FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable; FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable; FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p; FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p;
FSMC_NORSRAMInit( &FSMC_NORSRAMInitStructure );
FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM3, ENABLE);
} #endif /* DATA_IN_ExtSRAM */
I ran into the exact same problem and went in much the same way. But the example described is for the external SRAM mounted on STM324xG_EVAL board. And on the MCBSTM32F400, as I understood, the other circuit connection. In any case, I too will be grateful for any help in solving this problem.
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