<?xml version="1.0" encoding="UTF-8" ?>
<?xml-stylesheet type="text/xsl" href="https://community.arm.com/utility/feedstylesheets/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/"><channel><title>need help LPC3250 SDRAM initialization</title><link>https://community.arm.com/developer/tools-software/tools/f/keil-forum/27792/need-help-lpc3250-sdram-initialization</link><description> 
Hi, 

 
i&amp;#39;m using LPC3250 to interface with micron MT48LC16M16A2 (4
Meg x 16 x 4 banks) SDR SDRAM.i followed Blinky program as example
and initialized for my 256Mb SDRAM.i have written data on 16-bit wide
on the EMC_DYCS0_N memory location as below</description><dc:language>en-US</dc:language><generator>Telligent Community 10</generator><item><title>RE: need help LPC3250 SDRAM initialization</title><link>https://community.arm.com/thread/102435?ContentTypeID=1</link><pubDate>Tue, 05 Apr 2011 23:03:23 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:6aad88de-9344-4f98-8467-51f42f41939c</guid><dc:creator>IB Shy</dc:creator><description>&lt;p&gt;&lt;p&gt;
&lt;i&gt;&amp;quot;Is the above initialization for ONE SDRAM or TWO
SDRAM&amp;#39;s?&amp;quot;&lt;/i&gt;&lt;/p&gt;

&lt;p&gt;
It&amp;#39;s for neither. These lines are simply defining constants that
can be used in code further down the source file. You can select
within the IDE whether you want to include the code to initialise
bank0 and/or bank1.&lt;/p&gt;

&lt;p&gt;
It looks like your addresses are the same as the default startup
code. Have you checked that the addresses are correct for your
particular hardware configuration?&lt;/p&gt;

&lt;p&gt;
&lt;i&gt;&amp;quot;one more doubt is on hard ware design in static memory 8-bit
address starts with A[23:0] 16-bit address starts with A[23:1] 32-bit
address starts with A[23:2]&lt;br /&gt;
what if it is in case of Dynamic memory?&amp;quot;&lt;/i&gt;&lt;/p&gt;

&lt;p&gt;
I think, with this device, you must always connect the least
significant address line to A0 regardless of the data bus width or
memory type.&lt;/p&gt;
&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: need help LPC3250 SDRAM initialization</title><link>https://community.arm.com/thread/79187?ContentTypeID=1</link><pubDate>Tue, 05 Apr 2011 21:34:02 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:5179d4fe-f740-49f3-905f-2bb68345ee5f</guid><dc:creator>eswar g</dc:creator><description>&lt;p&gt;&lt;p&gt;
Thanks for the reply,&lt;/p&gt;

&lt;p&gt;
Is the above initialization for ONE SDRAM or TWO SDRAM&amp;#39;s? Because
We are using only one SDRAM. and running with the 16-bit wide data
lines. These are my setting on LPC32x0.s file.&lt;/p&gt;

&lt;pre&gt;
SDRAM0_MODE_REG     EQU     0x80018000  ; SDRAM0 Mode Register     Address
SDRAM0_EXT_MODE_REG EQU     0x8102C000  ; SDRAM0 Extended Mode Reg Address
SDRAM1_MODE_REG     EQU     0xA0018000  ; SDRAM1 Mode Register     Address
SDRAM1_EXT_MODE_REG EQU     0xA102C000  ; SDRAM1 Extended Mode Reg Address
&lt;/pre&gt;

&lt;p&gt;
one more doubt is on hard ware design in static memory 8-bit
address starts with A[23:0] 16-bit address starts with A[23:1] 32-bit
address starts with A[23:2]&lt;br /&gt;
what if it is in case of Dynamic memory?&lt;/p&gt;
&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: need help LPC3250 SDRAM initialization</title><link>https://community.arm.com/thread/59324?ContentTypeID=1</link><pubDate>Tue, 05 Apr 2011 06:17:00 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:991445b1-6a1d-4e58-b28c-78d25011e61c</guid><dc:creator>IB Shy</dc:creator><description>&lt;p&gt;&lt;p&gt;
&lt;i&gt;&amp;quot;i followed Blinky program as example and initialized for my
256Mb SDRAM.&amp;quot;&lt;/i&gt;&lt;/p&gt;

&lt;p&gt;
Looks like you haven&amp;#39;t initialised the SDRAM and/or control
registers correctly.&lt;/p&gt;

&lt;p&gt;
The startup file LPC32x0.s does not make this easy and it is
sorely lacking in useful detail. You will almost definitely have to
modify the constants:&lt;/p&gt;

&lt;pre&gt;
SDRAM0_MODE_REG     EQU     0x8000C000  ; SDRAM0 Mode Register     Address
SDRAM0_EXT_MODE_REG EQU     0x8102C000  ; SDRAM0 Extended Mode Reg Address
SDRAM1_MODE_REG     EQU     0xA0018000  ; SDRAM1 Mode Register     Address
SDRAM1_EXT_MODE_REG EQU     0xA102C000  ; SDRAM1 Extended Mode Reg Address
&lt;/pre&gt;

&lt;p&gt;
The address specified is used to pass configuration information to
the SDRAM.&lt;/p&gt;

&lt;p&gt;
Find the appropriate details in the documentation you have for
your particular SDRAM.&lt;/p&gt;
&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>