SSP peripheral + DMA

Can somebody please explain what the ISR of a DMA-enabled SSPx peripheral needs to do? I've read the user manual of the LPC24xx but I still don't fully understand how the ISR of the DMA (indicating end of transfer) relates to the ISR of SSPx - without DMA the incoming data is collected, but with DMA enabled the data should be handled by the DMA...?

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  • When running without DMA, you collect received data from the incomming FIFO and fills the outgoing FIFO with new data.

    With DMA, you "reload" the DMA by chaining in new buffers. Each DMA transfer can only span a limited amount of RAM, so you must regularly switch which RAM buffer to send data fram or to place received data in.

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  • When running without DMA, you collect received data from the incomming FIFO and fills the outgoing FIFO with new data.

    With DMA, you "reload" the DMA by chaining in new buffers. Each DMA transfer can only span a limited amount of RAM, so you must regularly switch which RAM buffer to send data fram or to place received data in.

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