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<?xml-stylesheet type="text/xsl" href="https://community.arm.com/utility/feedstylesheets/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/"><channel><title>My usart interrupt occure only one time!!</title><link>https://community.arm.com/developer/tools-software/tools/f/keil-forum/26232/my-usart-interrupt-occure-only-one-time</link><description> 
Hi. 
who can help me !! 
my interrupt occure only one time. I dont know why?? can any body
help me why my program dosent work correctly? 
my startup is SAM7.s 

 
thise is my code: 

 
#include &amp;quot;at91sam7x256.h&amp;quot; 
#include &amp;quot;lib_at91sam7x256.h&amp;quot; 
#include</description><dc:language>en-US</dc:language><generator>Telligent Community 10</generator><item><title>RE: My usart interrupt occure only one time!!</title><link>https://community.arm.com/thread/125975?ContentTypeID=1</link><pubDate>Thu, 04 Feb 2010 03:47:20 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:be29aead-d93f-4d4a-9663-4bac1a23a576</guid><dc:creator>Ali Salehi</dc:creator><description>&lt;p&gt;&lt;p&gt;
thanks for replay...pleas help me.&lt;/p&gt;
&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: My usart interrupt occure only one time!!</title><link>https://community.arm.com/thread/102057?ContentTypeID=1</link><pubDate>Thu, 04 Feb 2010 03:31:28 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:0025f75e-965c-4a59-93e8-64b4508f0fe7</guid><dc:creator>Ali Salehi</dc:creator><description>&lt;p&gt;&lt;p&gt;
pleas see my code.I think I do it.if value of it is incorrect
pleas say me.&lt;br /&gt;
in data sheet only say that by wirte in EOICR registery we can set
end of the interrupt . but dont say anything about its value!!&lt;/p&gt;
&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: My usart interrupt occure only one time!!</title><link>https://community.arm.com/thread/125976?ContentTypeID=1</link><pubDate>Thu, 04 Feb 2010 03:27:42 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:3b31d3a2-910f-4a1f-a319-5d32c334eee2</guid><dc:creator>Ali Salehi</dc:creator><description>&lt;p&gt;&lt;p&gt;
ok.&lt;br /&gt;
this is my code&lt;/p&gt;

&lt;pre&gt;
#include &amp;quot;at91sam7x256.h&amp;quot;
#include &amp;quot;lib_at91sam7x256.h&amp;quot;
#include &amp;quot;delay.h&amp;quot;
void Usart0IrqHandler(void);
int kk=70;

int main (void)
{

           volatile AT91PS_USART pUSART0 = AT91C_BASE_US0;
           int rx;
           unsigned int rxok;
           int errorcounter;


        *AT91C_PMC_PCER=0xC0000040;             //Peripheral Clock Enable
        *AT91C_PIOA_ASR=0X0000003;
        *AT91C_PIOA_BSR=0X0000000;
        *AT91C_PIOA_PDR=0x00000003;             //Disable I/O,PA5=RXD0,PA6=TXD0
        *AT91C_US0_IDR =0xFFFFFFFF;                             //ALL OFF USART INTERRUPT DISABLE
        *AT91C_US0_CR=0x000000AC;                               //RESET RX &amp;amp; TX
        *AT91C_US0_BRGR=0x139;                                  //BARD RATE:9600
        *AT91C_US0_TTGR=0x00000100;                         //SET TIME GARD=0

        AT91F_PDC_Open(AT91C_BASE_PDC_US0);
        *AT91C_US0_MR=0X8C0;                             //8bit,No,1Bit Stop,Asaynchron mode
        *AT91C_US0_CR=0x50;                                     //ENABLE RX &amp;amp; ENABLE tx
        *AT91C_US0_IER =0x01;               //rxbufer full interrupt is set
        *AT91C_AIC_IDCR=0x40;                           //DISABLE THE INTERRUOT ON THE INTERRUPT CONTROLLER
     AT91C_AIC_SVR[AT91C_ID_US0] = (unsigned int)Usart0IrqHandler; // Set the USART0 IRQ handler address in AIC
         AT91C_AIC_SMR[AT91C_ID_US0] =(0x00000007);
        *AT91C_AIC_IECR=0x40;
        *AT91C_AIC_FFDR=0XFFFFFFFF;
        while(1){
    *AT91C_US0_CR=0x100;
         rxok=*AT91C_US0_CSR;

        *AT91C_US0_IER =0x4;
        while(rxok==0x1a1b){
         rxok=*AT91C_US0_CSR;
     delay_ms(10);
         errorcounter=errorcounter+1;
         if (errorcounter==100)
           {
           *AT91C_US0_CR=0xc;                     // resettx/resetrx
           errorcounter=0;
           }
          }

  }
 return 0;
 }
 void Usart0IrqHandler(void){

        int rx;
        int i;
        volatile AT91PS_AIC pAIC = AT91C_BASE_AIC;


        unsigned int rxok;
        int errorcounter;
        errorcounter=0;

        kk=kk+1;
        rxok=*AT91C_US0_CSR;
        if (rxok &amp;amp;&amp;amp; 0x1){
         rx=(*AT91C_US0_RHR &amp;amp; 0xff);
         *AT91C_US0_THR=kk;//rx&amp;amp;0xff;
        }
        else
         while(rxok==0x1a1b){
         rxok=*AT91C_US0_CSR;
     delay_ms(10);
         errorcounter=errorcounter+1;
         if (errorcounter==1000)
           {
           *AT91C_US0_CR=0xc;                     // resettx/resetrx
           errorcounter=0;
           }
         };

        *AT91C_US0_CR=0x2100;
    *AT91C_US0_IDR =0x4;
         rxok=*AT91C_US0_CSR;





        *AT91C_AIC_EOICR =0x00;



        return;
 }
&lt;/pre&gt;
&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: My usart interrupt occure only one time!!</title><link>https://community.arm.com/thread/115522?ContentTypeID=1</link><pubDate>Thu, 04 Feb 2010 02:42:04 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:9aa3891b-11bd-4827-88df-10d24b3171f6</guid><dc:creator>Andy Neil</dc:creator><description>&lt;p&gt;&lt;p&gt;
As clearly stated in the instructions: &lt;a href="http://www.danlhenry.com/caps/keil_code.png"&gt;www.danlhenry.com/.../keil_code.png&lt;/a&gt;&lt;/p&gt;
&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: My usart interrupt occure only one time!!</title><link>https://community.arm.com/thread/103749?ContentTypeID=1</link><pubDate>Thu, 04 Feb 2010 02:29:39 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:e6a42f97-f11e-454c-9f0e-5f3ee688acc6</guid><dc:creator>Thorsten de Buhr</dc:creator><description>&lt;p&gt;&lt;p&gt;
remark:&lt;/p&gt;

&lt;p&gt;
&amp;lt; pre &amp;gt;&lt;br /&gt;
code&lt;br /&gt;
&amp;lt; / pre &amp;gt;&lt;/p&gt;

&lt;p&gt;
will help you posting code.&lt;/p&gt;
&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: My usart interrupt occure only one time!!</title><link>https://community.arm.com/thread/90239?ContentTypeID=1</link><pubDate>Thu, 04 Feb 2010 02:27:49 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:4f544a60-2d0b-46a3-b2ce-e65dfdf26841</guid><dc:creator>Thorsten de Buhr</dc:creator><description>&lt;p&gt;&lt;p&gt;
hi,&lt;/p&gt;

&lt;p&gt;
without reading the code ...&lt;/p&gt;

&lt;p&gt;
In some Interrupt Controllers you must acknowledge the
interrupt.&lt;/p&gt;

&lt;p&gt;
In some peripherals with several sources or-ed togather to one
interrupt you must also acknowledge the interrupt.&lt;/p&gt;

&lt;p&gt;
Else it doesn&amp;#39;t occur a second time.&lt;/p&gt;

&lt;p&gt;
BR,&lt;br /&gt;
/th.&lt;/p&gt;
&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: My usart interrupt occure only one time!!</title><link>https://community.arm.com/thread/57686?ContentTypeID=1</link><pubDate>Thu, 04 Feb 2010 02:19:46 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:7260c078-726f-44b7-a80e-87e897037712</guid><dc:creator>Tamir Michael</dc:creator><description>&lt;p&gt;&lt;p&gt;
unreadable code. repost.&lt;/p&gt;
&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>