I have problemm with critical sections again :(
When I execute vEnterCritical or vExitCritical step by step they works well.
When I step over this functions they switches CPU to interrupt mode... I can't understand such mess.
Here is my code
volatile unsigned int uiCriticalNesting = 0; extern "C" void __SWI_0 ( void ); extern "C" void __SWI_1 ( void ); void __swi(0) vEnterCritical( void ); void __SWI_0 ( void ) { int R12; __asm{ MRS R12, SPSR }; __asm{ ORR R12, R12, #0xC0 }; __asm{ MSR SPSR_CXSF, R12 }; ++uiCriticalNesting; } void __swi(1) vExitCritical( void ); void __SWI_1 ( void ) { if( uiCriticalNesting ) { --uiCriticalNesting; if( uiCriticalNesting == 0 ) { int R12; __asm{ MRS R12, SPSR }; __asm{ BIC R12, R12, #0xC0 }; __asm{ MSR SPSR_CXSF, R12 }; } } }
and:
T_Bit EQU 0x20 PRESERVE8 ; 8-Byte aligned Stack AREA SWI_Area, CODE, READONLY ARM EXPORT SWI_Handler SWI_Handler STMFD SP!, {R8, LR} ; Store R8, LR MRS R12, SPSR ; Get SPSR TST R12, #T_Bit ; Check Thumb Bit LDRNEH R12, [LR,#-2] ; Thumb: Load Halfword BICNE R12, R12, #0xFF00 ; Extract SWI Number LDREQ R12, [LR,#-4] ; ARM: Load Word BICEQ R12, R12, #0xFF000000 ; Extract SWI Number LDR R8, SWI_Count CMP R12, R8 BHS SWI_Dead ; Overflow ADR R8, SWI_Table LDR R12, [R8,R12,LSL #2] ; Load SWI Function Address MOV LR, PC ; Return Address BX R12 ; Call SWI Function LDMFD SP!, {R8, PC}^ ; Restore R8 and Return SWI_Dead B SWI_Dead ; None Existing SWI SWI_Cnt EQU (SWI_End-SWI_Table)/4 SWI_Count DCD SWI_Cnt IMPORT __SWI_0 IMPORT __SWI_1 SWI_Table DCD __SWI_0 ; SWI 0 Function Entry DCD __SWI_1 ; SWI 1 Function Entry SWI_End END
It worked for a months... Now it stopped working. Can anybody help?
When I step over this functions they switches CPU to interrupt mode
how do you know that? is it indicated by the debugger? when exactly does the processor switch to interrupt mode? what chip are you using?
Yes, I can see it in debugger.
When I check this step by step, modes are: user->supervisor->user.
When I step over with F10, before execution of this function mode is user and after F10 mode is interrupt.
It doesn't happen in simulator, only with real target and it doesn't happen at first call to these functions. It happens after a few calls. It started to happen yesterday, but even if I download to CPU earlier copy of programm which worked, it doesn't.
And I cannot find when exactly the processor switches to interrupt mode, because when I debug it step by step this doesn't happen.
I suppose the worst... undocumented hardware bug :( I use at91sam7x
HI.
<quote> I suppose the worst... undocumented hardware bug :( </quote>
i think it is not likly. especielly bcoz u say this;
<quote> I download to CPU earlier copy of programm which worked, it doesn't. </quote>
look 4 an other change. even won you think is small or insignificent
Always yo're freind.
Zeusti.
How to explain that copy of program which worked well 2 days ago now isn't working with no changes in code?
And why not hardware bug? So far I found at last 2 undocumented bugs in CPU and 1 in keil simulator ;)
do you have an infinite loop at your abort handlers? it loks like your processor resets, and it might not be caused by the provided piece of code.
have you checked the erratum document of your chip? which one are you using? either way, your problem certainly sounds like a software failure, not a hardware fault. the fact that it worked can be attributed to some other change masking the failure.
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