Hi, Can anyone tell me what is the byte ordering in C8051F020 SiLabs Microcontroller? Whether it is a Little Endian or Big Endian?
Thanks
HI.
<quote> the only 'byte ordering' there is in the actual controller is for the mov dptr,# (the only 16 bit operation in the processor) </quote>
and ajmp/ljmp for dst adress
and acall/lcall for ret addr on stck
and bibel tells u about it to.
Always yo're freind.
Zeusti.
There are, however, some other 16-bit SFRs OK, but they are not "in the processor" and the 'byte ordering' is not mandatory. Yes it is 'standardized' for the 'traditional, but were I to design a chip (fat chance) with a 16 bit register I could legally put the high and low byte SFRs in any order, even far apart, should I wish.
also there are no "16-bit SFRs" but some interface registers that are associated with 2 (8 bit) SFRs to make a 16 bit register
Erik
There are, however, some other 16-bit SFRs.
You have to load the bytes individually - but, again, check in the Datasheet for the order.
Note that Keil's sfr16 does not necessarily match a specific chip's required order...
Can anyone tell me what is the byte ordering in C8051F020 SiLabs Microcontroller
Whatever you want. However you will obviously let your assembler/compiler/linker decide for you.
the only 'byte ordering' there is in the actual controller is for the mov dptr,# (the only 16 bit operation in the processor) and the bible tell you what that is.
It's an 8-bit controller - so it deals only in bytes. Any multi-byte operations have to be entirely synthesised by the compiler - so the answer to your question will be found in the compiler Manual
http://www.keil.com/support/man/docs/c51/c51_ap_datastorage.htm http://www.keil.com/support/man/docs/c51/c51_ap_2bytescalar.htm http://www.keil.com/support/man/docs/c51/c51_ap_4bytescalar.htm etc...
The exception is any multi-byte SFRs - which will be defined in the chip's Datasheet
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