CAN RX FIFO on XE164

Hi,

I'm using CAN communication on an XE164 (MultiCAN). Currently, I'm trying to use an RX FIFO and not having much luck with it. The FIFO is set up using DAVE, but when I watch in the debugger I can see that only the first slave object (BOT) is ever filled. The pointer CUR is not advanced after reception, it remains set on the BOT object. The PNEXT of the BOT object does point to the next slave object, and all other BOT/TOP pointers appear to be correct.

Can anyone figure how this might happen?

Regards,
Alto Speckhardt

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  • I probably shouldn't post in this thread, since I don't know anything at all (!) about your chip.

    But a FIFO normally has a single read address/register and a single write address/register and is controlled by flags: transmit empty, transmit not empty, transmit not full, transmit full, receive empty, receive not empty, receive not full, receive full (or a subset of the flags). So when you get a receive interrupt, the code may do: while (!receive_empty) get_entry();

    Your symbols BOT, CUR, PNEXT etc sounds more like a linked list.

    Might you have two different concepts in your project? One hardware-controlled FIFO in the CAN controller, and then a software-based external queue in the form of a linked list? A hw FIFO is normally of a very limited size, while a sw queue/list may allow a large number of entries to be buffered.

    In that case, you may have a situation where you never fill more than one object in your software-based queue/list because you are always fast enough to process this entry before a new entry gets picked up from the hw FIFO.

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  • I probably shouldn't post in this thread, since I don't know anything at all (!) about your chip.

    But a FIFO normally has a single read address/register and a single write address/register and is controlled by flags: transmit empty, transmit not empty, transmit not full, transmit full, receive empty, receive not empty, receive not full, receive full (or a subset of the flags). So when you get a receive interrupt, the code may do: while (!receive_empty) get_entry();

    Your symbols BOT, CUR, PNEXT etc sounds more like a linked list.

    Might you have two different concepts in your project? One hardware-controlled FIFO in the CAN controller, and then a software-based external queue in the form of a linked list? A hw FIFO is normally of a very limited size, while a sw queue/list may allow a large number of entries to be buffered.

    In that case, you may have a situation where you never fill more than one object in your software-based queue/list because you are always fast enough to process this entry before a new entry gets picked up from the hw FIFO.

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