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<?xml-stylesheet type="text/xsl" href="https://community.arm.com/utility/feedstylesheets/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/"><channel><title>Why step into next instrution with TD3 different value?</title><link>https://community.arm.com/developer/tools-software/tools/f/keil-forum/23989/why-step-into-next-instrution-with-td3-different-value</link><description> 
First: 

 
#include &amp;lt;AT89X51.H&amp;gt;

unsigned int TD3=0;//
void t0(void) interrupt 1 using 3
{

TL0=(65536-50000)%256;
TH0=(65536-50000)/256; //6MHz
TD3++;
}
void main()
{//1
TMOD=0x11; //
TL0=(65536-50000)%256;
TH0=(65536-50000)/256; //
ET0=1;
EA=1;
TR0</description><dc:language>en-US</dc:language><generator>Telligent Community 10</generator><item><title>RE: Why step into next instrution with TD3 different value?</title><link>https://community.arm.com/thread/52608?ContentTypeID=1</link><pubDate>Sun, 12 Oct 2008 23:19:16 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:35f8b740-e653-4290-ac30-3c9512dcdde0</guid><dc:creator>ImPer Westermark</dc:creator><description>&lt;p&gt;&lt;p&gt;
You are using an 8-bit processor. The processor is incapable of
performing an atomic test of a 16-bit number, just as your 16-bit
assign of the timer registers has to be splitted into two 8-bit
assigns. The test is performed either low byte before high byte or
the reverse - and if the variable gets incremented in-between, you
get into troubles.&lt;/p&gt;

&lt;p&gt;
Why not let your interrupt perform the compare/reset, and set a
flag?&lt;/p&gt;

&lt;p&gt;
You also have to think about this problem when you reload the
timer in your interrupt handler - what happens when you assign just
the low or the high part of the timer value?&lt;/p&gt;
&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>