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<?xml-stylesheet type="text/xsl" href="https://community.arm.com/utility/feedstylesheets/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/"><channel><title>Interrupts, EIC Nested Interrupts  KEIL / ST differences</title><link>https://community.arm.com/developer/tools-software/tools/f/keil-forum/20760/interrupts-eic-nested-interrupts-keil-st-differences</link><description> 
I have a reasonably stable program written using the TIM Example
as an original basis( RV30\Examples\ST\STR73xLIB\TIM ). 

 
Now I am experiencing problems with re-entering a UART interrupt
when I dont want to ( recursion ). 

 
I assume I am using</description><dc:language>en-US</dc:language><generator>Telligent Community 10</generator><item><title>RE: Interrupts, EIC Nested Interrupts  KEIL / ST differences</title><link>https://community.arm.com/thread/138271?ContentTypeID=1</link><pubDate>Sun, 01 Oct 2006 10:16:18 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:16d0acd2-d5a8-44fb-a971-4ccd4138de44</guid><dc:creator>doubt that my ISP Al Bradford</dc:creator><description>&lt;p&gt;&lt;p&gt;
Stack space! As we increased our use of muliple interrupts we
overran our stack space. A very typical shot in the foot programming.
Running smooth again for now.&lt;br /&gt;
Bradford&lt;/p&gt;
&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Interrupts, EIC Nested Interrupts  KEIL / ST differences</title><link>https://community.arm.com/thread/134828?ContentTypeID=1</link><pubDate>Wed, 27 Sep 2006 13:28:21 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:b65933e6-7dbb-48de-b6f1-e214077f013b</guid><dc:creator>doubt that my ISP Al Bradford</dc:creator><description>&lt;p&gt;&lt;p&gt;
Thanks Mike;&lt;br /&gt;
I have picked up support of this code while the programmer is on
vacation. I&amp;#39;m trying to find my way through his code. It appears
pretty clean.&lt;br /&gt;
I followed your advice and made some strides. My A/D is not on the
STR7 chip but is a high speed A/D driving some pre-processing in an
FPGA. The FPGA interrupts the STR7 at 10mSec rate via the XTI.
Servicing that interrupt take a couple of microsecs.&lt;br /&gt;
I placed the UART0 function in a tight loop driving a simple ASCII
data stream. Between the two there was no apparent problem. BUT, each
time I attempt to use the keyboard my failure time is between 5 and
10 minutes of operation. So, I&amp;#39;m slowly defining the problem. I&amp;#39;m
using the Keil versions of the STR71x Libs as suggested in the RTL
manuals.&lt;br /&gt;
Thanks again.&lt;br /&gt;
Bradford&lt;/p&gt;
&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Interrupts, EIC Nested Interrupts  KEIL / ST differences</title><link>https://community.arm.com/thread/123413?ContentTypeID=1</link><pubDate>Wed, 27 Sep 2006 11:17:46 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:ae228b73-f76e-4fcb-ae47-7b5f7eb3e5c2</guid><dc:creator>Mik Kleshov</dc:creator><description>&lt;p&gt;&lt;p&gt;
Actually while debugging my application I found that when using my
IRQ code, nested interrupts may cause corruption of CPU registers
and/or CPSR. So much for smaller and faster code :-) I&amp;#39;ll have to sit
down and look very carefully at my code, or revert to ST&amp;#39;s one. The
description of EIC in the microcontroller reference manual is not
exactly straightforward, which doesn&amp;#39;t help. The lesson to learn here
is that unless you are prepared to study the inner workings of
interrupt handling in STR7x, get code you can trust to work.&lt;br /&gt;
In your situation, if you are using ST&amp;#39;s interrupt handling code, it
should be easy to modify it to not re-enable interrupts before
entering ISR. Then you&amp;#39;ll be able to re-enable them in ISR if you
need to.&lt;br /&gt;
I would suggest a method of debugging such problems that worked for
me. If you think that a bug is caused by a combination of two
interrupts, make the interrupts trigger more frequently if you can.
This way you won&amp;#39;t have to wait long for the bug to manifest
itself.&lt;/p&gt;

&lt;p&gt;
Regards,&lt;br /&gt;
- mike&lt;/p&gt;
&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Interrupts, EIC Nested Interrupts  KEIL / ST differences</title><link>https://community.arm.com/thread/112329?ContentTypeID=1</link><pubDate>Wed, 27 Sep 2006 08:29:07 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:bb7e7c19-4a76-4175-9620-4c6580882301</guid><dc:creator>doubt that my ISP Al Bradford</dc:creator><description>&lt;p&gt;&lt;p&gt;
Mike;&lt;br /&gt;
Will your Int routines run with RealView RTOS?&lt;br /&gt;
Using the Keil RTX you must disable EIC setup in Startup. Keil claims
their Interrupt Lib functions are much faster than the general
purpose STR7x Lib functions but require special handling for
initialization. Using the Keil RTX prevents the use of the the STRx
Libs according to Keil notes. The on-line manuals and the CD manuals
don&amp;#39;t give a lot of info on proper handling of possible nested
interrupts.&lt;br /&gt;
Most of the info must be dredged from the Keil Lib source files. But
of course, we all know that &amp;#39;C&amp;#39; code is self documenting right?&lt;br /&gt;
We are having a problem with interrupt collison between out UART0
(random keyboard use) and XTI 10mSec edge triggered A/D interrupt.
The problems occurs about every second rainy Tuesday of the week.&lt;br /&gt;
Any suggestions are appreciated.&lt;br /&gt;
Bradford&lt;/p&gt;
&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Interrupts, EIC Nested Interrupts  KEIL / ST differences</title><link>https://community.arm.com/thread/98456?ContentTypeID=1</link><pubDate>Wed, 27 Sep 2006 00:20:51 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:e38ec953-c3c9-4483-8034-02cbf081151f</guid><dc:creator>Mik Kleshov</dc:creator><description>&lt;p&gt;&lt;p&gt;
Another option would be to re-code ST&amp;#39;s ISR wrapper. I have done
that and I believe that my code is smaller and faster than ST&amp;#39;s. The
drawback of my code is that you have to enable interrupts within each
ISR to allow interrupt nesting, but that is actually an advantage in
your case. I could email the code to you if you wish.&lt;/p&gt;

&lt;p&gt;
Regards,&lt;br /&gt;
- mike&lt;/p&gt;
&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Interrupts, EIC Nested Interrupts  KEIL / ST differences</title><link>https://community.arm.com/thread/74387?ContentTypeID=1</link><pubDate>Tue, 26 Sep 2006 16:00:26 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:a4dcae5b-c9ad-4a82-99c0-7c10f9ca47c4</guid><dc:creator>seth p</dc:creator><description>&lt;p&gt;&lt;p&gt;
Hi Mike,&lt;br /&gt;
I believe your correct, having briefly traced this through. It is as
I had expected. It seems like its taking a liberty though, because if
you actually *DONT* want interrupts re-enabled, there is a window of
time before this wrapper code enters your own routine from where you
could disable it. However, within that period, a new interrupt and
unwanted recursion could occur.&lt;br /&gt;
I am re-coding to use the Keil Style interrupts which I presume
avoids this scenario.&lt;br /&gt;
Welcome any further comments on this as I am still new to using the
device.&lt;/p&gt;
&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: Interrupts, EIC Nested Interrupts  KEIL / ST differences</title><link>https://community.arm.com/thread/46885?ContentTypeID=1</link><pubDate>Mon, 25 Sep 2006 04:23:21 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:a3a93f62-6123-4832-9a73-86f6ed809c53</guid><dc:creator>Mik Kleshov</dc:creator><description>&lt;p&gt;&lt;p&gt;
I&amp;#39;m actually programming an STR710 using IAR toolchain, but if the
&amp;#39;ST type&amp;#39; interrupts means what I think it means, the wrapper for
ISR&amp;#39;s written in assembly enables interrupts for you.&lt;/p&gt;

&lt;p&gt;
- mike&lt;/p&gt;
&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>