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<?xml-stylesheet type="text/xsl" href="https://community.arm.com/utility/feedstylesheets/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/"><channel><title>c51:</title><link>https://community.arm.com/developer/tools-software/tools/f/keil-forum/20483/c51</link><description> 
While trying to interface flash SST25VF512 with AT80c51, 
i find difficulty in Byte program mode of writing to flash. 

 
This is the code i used, could somebody who has worked on this
please help me out, 

 
void main(void){
 ce = 1;
 SCK = 0;
 TMOD</description><dc:language>en-US</dc:language><generator>Telligent Community 10</generator><item><title>RE: c51:</title><link>https://community.arm.com/thread/134820?ContentTypeID=1</link><pubDate>Tue, 03 Oct 2006 05:13:43 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:7245984c-5d1b-4f9b-a800-ba5f73ca3317</guid><dc:creator>alan raj</dc:creator><description>&lt;p&gt;&lt;p&gt;
Had followed the manufacturer&amp;#39;s code supposedly&lt;br /&gt;
there are fine changes to be done&lt;br /&gt;
thought you got an eye for detail&lt;br /&gt;
SST does provide code, though there are things to be added to it like
Enable operation etc..&lt;/p&gt;
&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: c51:</title><link>https://community.arm.com/thread/134818?ContentTypeID=1</link><pubDate>Tue, 03 Oct 2006 04:26:11 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:ef5e62fc-c15c-4b61-a5a1-4d5c683e8962</guid><dc:creator>alan raj</dc:creator><description>&lt;p&gt;&lt;p&gt;
If that had worked, would not have asked you&lt;/p&gt;
&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: c51:</title><link>https://community.arm.com/thread/123414?ContentTypeID=1</link><pubDate>Tue, 03 Oct 2006 03:59:10 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:69850e5b-a533-4fbf-9232-59757ad08780</guid><dc:creator>Andy Neil</dc:creator><description>&lt;p&gt;&lt;p&gt;
&lt;i&gt;&amp;quot;How do you say the write function code should be&amp;quot;&lt;/i&gt;&lt;/p&gt;

&lt;p&gt;
Never mind what I say - what does the &lt;b&gt;Manufacturer&lt;/b&gt; say?&lt;/p&gt;

&lt;p&gt;
Don&amp;#39;t SST provide example code for this?&lt;/p&gt;
&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: c51:</title><link>https://community.arm.com/thread/74397?ContentTypeID=1</link><pubDate>Tue, 03 Oct 2006 02:20:17 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:bade0cbb-08bb-4bf3-9821-9bfd1617dcf4</guid><dc:creator>alan raj</dc:creator><description>&lt;p&gt;&lt;p&gt;
&amp;quot;However, the status register in these types of flash is
non-volatile, implemented with the same flash technology as the rest
of the chip.&amp;quot;&lt;br /&gt;
How is that only status reg is non volatile?&lt;br /&gt;
I could nt find this info in datasheet.&lt;br /&gt;
Where do we get such finer details?&lt;/p&gt;
&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: c51:</title><link>https://community.arm.com/thread/112339?ContentTypeID=1</link><pubDate>Tue, 03 Oct 2006 01:43:19 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:116e25e4-e4f2-41e7-91b4-863e563f9e74</guid><dc:creator>alan raj</dc:creator><description>&lt;p&gt;&lt;p&gt;
Thanks Neil,&lt;br /&gt;
How do you say the write function code should be,&lt;br /&gt;
After writing the byte, the status reg reads 02, ie finished
writing.&lt;br /&gt;
Then should there be some change in the read function code?&lt;br /&gt;
Where do you think is the mistake,&lt;/p&gt;
&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: c51:</title><link>https://community.arm.com/thread/98457?ContentTypeID=1</link><pubDate>Tue, 03 Oct 2006 01:35:31 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:e9d3e7f6-bd73-40ba-9918-a3b74809adaf</guid><dc:creator>Andy Neil</dc:creator><description>&lt;p&gt;&lt;p&gt;
&lt;i&gt;&amp;quot;Could you please tell this rated number of cycles.&amp;quot;&lt;/i&gt;&lt;/p&gt;

&lt;p&gt;
That&amp;#39;ll be in the &lt;b&gt;datasheet&lt;/b&gt;&lt;/p&gt;

&lt;p&gt;
Note that it is not a precise number below which everything is
fine and above which nothing works; the thing wears out
gradually.&lt;/p&gt;
&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: c51:</title><link>https://community.arm.com/thread/74394?ContentTypeID=1</link><pubDate>Tue, 03 Oct 2006 01:32:53 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:dbc862c8-7cdf-42d4-a765-b3e7553535b3</guid><dc:creator>alan raj</dc:creator><description>&lt;p&gt;&lt;p&gt;
sorry drew,&lt;/p&gt;
&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: c51:</title><link>https://community.arm.com/thread/134817?ContentTypeID=1</link><pubDate>Tue, 03 Oct 2006 00:49:24 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:4f72ec22-f9da-422a-b7ea-3f9de494a64d</guid><dc:creator>alan raj</dc:creator><description>&lt;p&gt;&lt;p&gt;
Ok, since i am doing it manually to clock the flash thru SCK. I
believe 8051 uses the internal crystal to execute through the
program. that is 11.0592 MHz&lt;/p&gt;
&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: c51:</title><link>https://community.arm.com/thread/74393?ContentTypeID=1</link><pubDate>Tue, 03 Oct 2006 00:33:56 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:e0e921c9-557f-409d-9e1e-1229872bbf14</guid><dc:creator>alan raj</dc:creator><description>&lt;p&gt;&lt;p&gt;
Thanks Dave,&lt;br /&gt;
so you suggest WRSR need not be written IN the write operation is it,
fine,&lt;br /&gt;
then how do we set the memory protection bits?&lt;br /&gt;
Without setting them, is there any way to write,&lt;/p&gt;

&lt;p&gt;
&amp;quot;After the rated number of cycles on your flash chip, the status
register will burn out and the chip will stop working, even if the
data sectors are still good.&amp;quot;&lt;br /&gt;
Could you please tell this rated number of cycles. Can write
operation process be completed within that?&lt;/p&gt;

&lt;p&gt;
&amp;quot;Using WRSR is not necessary, and will limit the lifetime of the
chip if you frequently write data.&amp;quot;&lt;br /&gt;
Is it apart from the 10,000 cycles for the chip as a whole?&lt;/p&gt;

&lt;p&gt;
Then how do we get to write data and check also that the program
is running fine,&lt;/p&gt;

&lt;p&gt;
waiting for reply,&lt;/p&gt;
&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: c51:</title><link>https://community.arm.com/thread/74403?ContentTypeID=1</link><pubDate>Tue, 03 Oct 2006 00:33:36 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:fcaefd56-d2d7-4220-a232-92756d0ec025</guid><dc:creator>alan raj</dc:creator><description>&lt;p&gt;&lt;p&gt;
Thanks Dave,&lt;br /&gt;
so you suggest WRSR need not be written IN the write operation is it,
fine,&lt;br /&gt;
then how do we set the memory protection bits?&lt;br /&gt;
Without setting them, is there any way to write,&lt;/p&gt;

&lt;p&gt;
&amp;quot;After the rated number of cycles on your flash chip, the status
register will burn out and the chip will stop working, even if the
data sectors are still good.&amp;quot;&lt;br /&gt;
Could you please tell this rated number of cycles. Can write
operation process be completed within that?&lt;/p&gt;

&lt;p&gt;
&amp;quot;Using WRSR is not necessary, and will limit the lifetime of the
chip if you frequently write data.&amp;quot;&lt;br /&gt;
Is it apart from the 10,000 cycles for the chip as a whole?&lt;/p&gt;

&lt;p&gt;
Then how do we get to write data and check also that the program
is running fine,&lt;/p&gt;
&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: c51:</title><link>https://community.arm.com/thread/112337?ContentTypeID=1</link><pubDate>Tue, 03 Oct 2006 00:20:43 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:4c04d59a-16d3-4f9b-b818-c9ce11ceda23</guid><dc:creator>alan raj</dc:creator><description>&lt;p&gt;&lt;p&gt;
So what do i do in this case, please tell me&lt;/p&gt;
&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: c51:</title><link>https://community.arm.com/thread/46913?ContentTypeID=1</link><pubDate>Fri, 29 Sep 2006 12:31:16 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:9e53b250-76a0-4b91-ace2-8611c458b5c0</guid><dc:creator>Drew Davis</dc:creator><description>&lt;p&gt;&lt;p&gt;
You probably do not want to write the status register before every
write operation. Yes, there is a write enable bit there, and yes,
this sequence will work correctly. However, the status register in
these types of flash is non-volatile, implemented with the same flash
technology as the rest of the chip. Every time you write the status
register, you effectively erase it and reprogram it. After the rated
number of cycles on your flash chip, the status register will burn
out and the chip will stop working, even if the data sectors are
still good.&lt;/p&gt;

&lt;p&gt;
The WREN command is sufficient to tell the chip to allow
programming. It does not cause the status register to be erased and
reprogrammed as does WRSR. Using WRSR is not necessary, and will
limit the lifetime of the chip if you frequently write data.&lt;/p&gt;
&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: c51:</title><link>https://community.arm.com/thread/98459?ContentTypeID=1</link><pubDate>Fri, 29 Sep 2006 10:04:03 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:088f73c6-5dc2-4149-8730-6cfb8aea4526</guid><dc:creator>Andy Neil</dc:creator><description>&lt;p&gt;&lt;p&gt;
&lt;i&gt;&amp;quot;If it is able to read , then i believe speed mismatch is not
the problem&amp;quot;&lt;/i&gt;&lt;/p&gt;

&lt;p&gt;
Read what?&lt;br /&gt;
Do you mean that your code reads the flash OK?&lt;/p&gt;

&lt;p&gt;
This does not necessarily mean that your timing is correct for
writing!&lt;/p&gt;

&lt;p&gt;
Your timing could be marginal; ie, &amp;quot;only just close enough&amp;quot; for
reading and that could make it &amp;quot;only just over the limit&amp;quot; for writing
- hence reading could work, and writing not!&lt;/p&gt;
&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: c51:</title><link>https://community.arm.com/thread/123417?ContentTypeID=1</link><pubDate>Fri, 29 Sep 2006 09:58:03 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:b1150e27-ec90-42f0-a137-971ff1f783fa</guid><dc:creator>Andy Neil</dc:creator><description>&lt;p&gt;&lt;p&gt;
&lt;i&gt;&amp;quot;clocking 8051, you mean baud rate&amp;quot;&lt;/i&gt;&lt;/p&gt;

&lt;p&gt;
No.&lt;/p&gt;

&lt;p&gt;
The CPU clock is the crystal fequency, or the frequency of
whatever clock source you use instead of a crystal. This is what
clocks the CPU - hence the term, &amp;quot;CPU Clock&amp;quot;&lt;/p&gt;
&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: c51:</title><link>https://community.arm.com/thread/123418?ContentTypeID=1</link><pubDate>Fri, 29 Sep 2006 09:45:29 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:0532a059-d8ef-4dc6-8659-dfd7450e229d</guid><dc:creator>alan raj</dc:creator><description>&lt;p&gt;&lt;p&gt;
We divide crystal frequency by 12 and then further&lt;br /&gt;
by 16 or 32 depending on smod&lt;/p&gt;

&lt;p&gt;
If that is it, then its 12 clocker,&lt;br /&gt;
Is it right?&lt;/p&gt;
&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: c51:</title><link>https://community.arm.com/thread/112338?ContentTypeID=1</link><pubDate>Fri, 29 Sep 2006 09:41:31 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:b0021c53-08d9-4f6a-932f-59a0283f8a7e</guid><dc:creator>alan raj</dc:creator><description>&lt;p&gt;&lt;p&gt;
clocking 8051, you mean baud rate&lt;br /&gt;
that is set to 9600, smod is mode 0, so, not doubled,&lt;/p&gt;

&lt;p&gt;
i think its 12 clocker&lt;/p&gt;
&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: c51:</title><link>https://community.arm.com/thread/74401?ContentTypeID=1</link><pubDate>Fri, 29 Sep 2006 09:26:58 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:2f2e9cf3-db99-4375-899d-8a7fa1df64f8</guid><dc:creator>alan raj</dc:creator><description>&lt;p&gt;&lt;p&gt;
If it is able to read , then i believe speed mismatch is not the
problem,&lt;/p&gt;

&lt;p&gt;
what could be the problem,&lt;/p&gt;
&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: c51:</title><link>https://community.arm.com/thread/98460?ContentTypeID=1</link><pubDate>Fri, 29 Sep 2006 08:58:35 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:d58a8611-d84c-4e23-86f4-fc5c7ea9e000</guid><dc:creator>Andy Neil</dc:creator><description>&lt;p&gt;&lt;p&gt;
Erik asked:&lt;br /&gt;
&lt;i&gt;&amp;quot;1) what is your CPU clock&amp;quot;&lt;/i&gt;&lt;/p&gt;

&lt;p&gt;
hem raj2 replied&lt;br /&gt;
&lt;i&gt;&amp;quot;It is 450 MHz&amp;quot;&lt;/i&gt;&lt;/p&gt;

&lt;p&gt;
No - Erik is asking what speed you are clocking the &lt;b&gt;AT80c51&lt;/b&gt;
!!&lt;/p&gt;

&lt;p&gt;
&lt;i&gt;&amp;quot;how do we find if its 6 clocker or 12 clocker&amp;quot;&lt;/i&gt;&lt;/p&gt;

&lt;p&gt;
See the Data Sheet&lt;/p&gt;
&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: c51:</title><link>https://community.arm.com/thread/74402?ContentTypeID=1</link><pubDate>Fri, 29 Sep 2006 08:39:05 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:e6c13cbf-9d35-48ec-9c11-05fbe2ea23a7</guid><dc:creator>alan raj</dc:creator><description>&lt;p&gt;&lt;p&gt;
It is 450 MHz,&lt;br /&gt;
could you please tell how do we find if its 6 clocker or 12
clocker?&lt;/p&gt;

&lt;p&gt;
3) SST25VF512 is SPI compatible,&lt;br /&gt;
given its max clock speed is 20 MHz,&lt;/p&gt;

&lt;p&gt;
we set baud as SMOD = 0, TH = -3, 9600 baud for 8051&lt;br /&gt;
how is it found for flash?&lt;/p&gt;
&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: c51:</title><link>https://community.arm.com/thread/50365?ContentTypeID=1</link><pubDate>Thu, 28 Sep 2006 10:05:18 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:c00ee0a3-0a18-4a99-b3f4-5521b8970326</guid><dc:creator>erik  malund</dc:creator><description>&lt;p&gt;&lt;p&gt;
a brief look makes me &lt;b&gt;guess&lt;/b&gt; that you are running too
fast&lt;br /&gt;
1) what is your CPU clock&lt;br /&gt;
2) is your CPU a 12-clocker 6-clocker ... ?&lt;br /&gt;
3) what is the max IIC baudrate for the SST25VF512&lt;/p&gt;

&lt;p&gt;
Erik&lt;/p&gt;
&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>