Register Bank 0

Somehow reading the chapter on "CPU registers of the 8051 variants"user guide 02.2001 about Macro Assembler and Utilities on registers R0-R7 give me the impression that the 8051 has a on-chip R0-R7 that in the chip but not in DATA area 0x00 - 0x1F.

However, using register bank 0 and much debugging, realised it is not. The R0-R7 resides on the DATA area 0x00-0x1F.

Is it just me or the documentary on that is confusing?

Parents
  • You're trying to learn very basic things about 8051s from not exactly the right document. The A51 manual is no substitute for a proper textbook on the '51 architecture.

    Get "the bible" (search this forum and you'll find ample links to it), or a real textbook, and learn processor behaviour from that. Then come back to the A51 manual to learn how those hardware concepts are represented in software.

Reply
  • You're trying to learn very basic things about 8051s from not exactly the right document. The A51 manual is no substitute for a proper textbook on the '51 architecture.

    Get "the bible" (search this forum and you'll find ample links to it), or a real textbook, and learn processor behaviour from that. Then come back to the A51 manual to learn how those hardware concepts are represented in software.

Children
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