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<?xml-stylesheet type="text/xsl" href="https://community.arm.com/utility/feedstylesheets/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/"><channel><title>About asemble language and its encoding rule</title><link>https://community.arm.com/developer/tools-software/tools/f/keil-forum/18712/about-asemble-language-and-its-encoding-rule</link><description> In infenion Instrction set manual,there are 2 instrctions as follow, 
MOV Rwn, #data4 E0 #n 2 
MOV reg, #data16 E6 RR ## ## 4 
where Rwn refers to Word GPR (R0, R1, …, R15); reg refers to SFR/ESFR or GPR 
In my BIN file there is one machine code&amp;quot;E6 RR</description><dc:language>en-US</dc:language><generator>Telligent Community 10</generator><item><title>RE: About asemble language and its encoding rule</title><link>https://community.arm.com/thread/122719?ContentTypeID=1</link><pubDate>Tue, 22 Mar 2005 01:51:13 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:744a6b03-75c4-4e0a-9b8b-66d24465d3d3</guid><dc:creator>wang wei</dc:creator><description>&lt;p&gt;&amp;quot;Perhaps there&amp;#39;s a way to force the data width to 16 bits.A really crude and ugly way to get the desired instruction would be to use a 16-bit value (MOV R9, #8000)&amp;quot;&lt;br /&gt;
&lt;br /&gt;
The idea is very good,but I have tried it and it has no sense.Finally,an advice from a kindly friend of Keil technical support in Asia help me to settle the problem.Itis using the format as &amp;quot;MOV R9,#DATA16 0X00&amp;quot; can get the &amp;quot;E6 F9 00 00&amp;quot;16 bits opcode.&lt;br /&gt;
&lt;br /&gt;
I am very appreciate of all the kindly help.&lt;br /&gt;
wangwei&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: About asemble language and its encoding rule</title><link>https://community.arm.com/thread/111352?ContentTypeID=1</link><pubDate>Mon, 21 Mar 2005 11:32:22 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:6fce0113-d8c0-4c3e-b0f7-d6720eb85106</guid><dc:creator>Drew Davis</dc:creator><description>&lt;p&gt;&lt;i&gt;unless you somehow need to match the existing code byte for byte&lt;/i&gt;&lt;br /&gt;
&lt;br /&gt;
I assumed that was the problem in this case.  That is, what if you need to patch some old code and you have only the binary?  You&amp;#39;d like everything but your change to remain byte-for-byte identical just to avoid worries and testing hassle.&lt;br /&gt;
&lt;br /&gt;
So, the question is how to force the C166 assembler to generate the less than optimal instruction for MOV R9, #0.  Perhaps there&amp;#39;s a way to force the data width to 16 bits.&lt;br /&gt;
&lt;br /&gt;
A really crude and ugly way to get the desired instruction would be to use a 16-bit value (MOV R9, #8000), and then patch just that one byte in the output from the assembler.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: About asemble language and its encoding rule</title><link>https://community.arm.com/thread/97016?ContentTypeID=1</link><pubDate>Mon, 21 Mar 2005 07:27:24 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:5a8f5b49-e4e9-4d0f-836f-b7ed4d75480d</guid><dc:creator>HansBernhard Broeker</dc:creator><description>&lt;p&gt;&lt;i&gt;In my BIN file,the opcode &amp;quot;E0 09&amp;quot; and &amp;quot;E6 F9 00 00&amp;quot; are all disasmbled to be&lt;br /&gt;
MOV r9,#0.that is, it isn&amp;#39;t indentical,why?&lt;/i&gt;&lt;br /&gt;
&lt;br /&gt;
You&amp;#39;re still missing the point.  They&amp;#39;re both disassembled like that because these two opcodes have identical effect, even though their encoding is different.  Either that, or the disassembler is broken (which would be way off-topic in this forum, since IDA is not by Keil).&lt;br /&gt;
&lt;br /&gt;
The point you&amp;#39;re completely missing is that this is &lt;b&gt;not&lt;/b&gt; anything to be worried about unless you somehow need to match the existing code byte for byte.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: About asemble language and its encoding rule</title><link>https://community.arm.com/thread/73115?ContentTypeID=1</link><pubDate>Sun, 20 Mar 2005 18:41:15 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:6d195764-24ba-403a-b316-ec05755f5450</guid><dc:creator>wang wei</dc:creator><description>&lt;p&gt;&amp;quot;a programming tool generating a smaller, faster opcode to implement a given operation than some other&amp;quot;&lt;br /&gt;
&lt;br /&gt;
Thank you for your help.&lt;br /&gt;
&lt;br /&gt;
But I want to say that it surely not a copyright problem,only a work done by someone in my school,but its&amp;#39; source file hasn&amp;#39;t been found by now.&lt;br /&gt;
&lt;br /&gt;
In my BIN file,the opcode &amp;quot;E0 09&amp;quot; and &amp;quot;E6 F9 00 00&amp;quot; are all disasmbled to be&lt;br /&gt;
MOV r9,#0.that is, it isn&amp;#39;t indentical,why?&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>RE: About asemble language and its encoding rule</title><link>https://community.arm.com/thread/50330?ContentTypeID=1</link><pubDate>Sun, 20 Mar 2005 08:43:01 GMT</pubDate><guid isPermaLink="false">dd9e70c8-6d3c-4c71-b136-2456382a7b5c:b946d435-38b2-405c-b098-7dcab93aa70c</guid><dc:creator>HansBernhard Broeker</dc:creator><description>&lt;p&gt;This surely must be the first time anybody complained about a programming tool generating a smaller, faster opcode to implement a given operation than some other.   It implies you&amp;#39;re trying to do the wrong thing --- not to mention that the way you describe your workflow rather strongly indicates you&amp;#39;re probably trying to violate somebody else&amp;#39;s copyright in the process.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>